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scons: Put all config variables in an env['CONF'] sub-dict.

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This makes what are configuration and what are internal SCons variables
explicit and separate, and makes it unnecessary to call out what
variables to export to C++.

These variables will also be plumbed into and out of kconfiglib in later
changes.

Change-Id: Iaf5e098d7404af06285c421dbdf8ef4171b3f001
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56892
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2022-02-15 22:23:43 -08:00
parent caa5f12e21
commit e6c0ba97db
87 changed files with 211 additions and 233 deletions
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11
src/arch/riscv/SConscript
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@@ -75,12 +75,11 @@ SimObject('RiscvTLB.py', sim_objects=['RiscvPagetableWalker', 'RiscvTLB'],
tags='riscv isa')
SimObject('RiscvCPU.py', sim_objects=[], tags='riscv isa')
if env['TARGET_ISA'] == 'riscv':
SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('TimingSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('O3CPU.py', sim_objects=[], tags='riscv isa')
SimObject('MinorCPU.py', sim_objects=[], tags='riscv isa')
SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('TimingSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='riscv isa')
SimObject('O3CPU.py', sim_objects=[], tags='riscv isa')
SimObject('MinorCPU.py', sim_objects=[], tags='riscv isa')
DebugFlag('RiscvMisc', tags='riscv isa')
DebugFlag('PMP', tags='riscv isa')