diff --git a/build_opts/ARM_MESI_Three_Level b/build_opts/ARM_MESI_Three_Level
new file mode 100644
index 0000000000..1836fb095b
--- /dev/null
+++ b/build_opts/ARM_MESI_Three_Level
@@ -0,0 +1,6 @@
+# Copyright (c) 2019 ARM Limited
+# All rights reserved.
+
+TARGET_ISA = 'arm'
+CPU_MODELS = 'TimingSimpleCPU, O3CPU'
+PROTOCOL = 'MESI_Three_Level'
diff --git a/build_opts/ARM_MOESI_hammer b/build_opts/ARM_MOESI_hammer
new file mode 100644
index 0000000000..2eddc5b05d
--- /dev/null
+++ b/build_opts/ARM_MOESI_hammer
@@ -0,0 +1,6 @@
+# Copyright (c) 2019 ARM Limited
+# All rights reserved.
+
+TARGET_ISA = 'arm'
+CPU_MODELS = 'TimingSimpleCPU, O3CPU'
+PROTOCOL = 'MOESI_hammer'