From 15613161c28591ca1a40d019a1568f01d68d5743 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 1 Nov 2003 13:20:44 -0500 Subject: [PATCH 01/29] Commit a command for use inside a simulated system for communicating with the simulator. This program is generally compiled as the name m5 and installed in /usr/local/bin This command uses opcodes that are invalid on a normal system, so don't expect it to do anything on a real system. --HG-- extra : convert_revision : fcbae99d4b0d38ff4a9950f1ab53923baa1f667a --- util/m5/Makefile | 13 ++++++++++ util/m5/m5.c | 62 +++++++++++++++++++++++++++++++++++++++++++++ util/m5/m5op.h | 11 ++++++++ util/m5/m5op.s | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 152 insertions(+) create mode 100644 util/m5/Makefile create mode 100644 util/m5/m5.c create mode 100644 util/m5/m5op.h create mode 100644 util/m5/m5op.s diff --git a/util/m5/Makefile b/util/m5/Makefile new file mode 100644 index 0000000000..f77a6cac3f --- /dev/null +++ b/util/m5/Makefile @@ -0,0 +1,13 @@ +all: m5 + +m5: m5.o m5op.o + cc -o m5 m5.o m5op.o + +m5op.o: m5op.s + as -o m5op.o m5op.s + +m5.o: m5.c + cc -c -o m5.o m5.c + +clean: + @rm -f m5 *.o *~ diff --git a/util/m5/m5.c b/util/m5/m5.c new file mode 100644 index 0000000000..4bd515c5d0 --- /dev/null +++ b/util/m5/m5.c @@ -0,0 +1,62 @@ +#include + +#include +#include +#include +#include + +#include "m5op.h" + +char *progname; + +void +usage() +{ + char *name = basename(progname); + printf("usage: %s ivlb \n" + " %s ivle \n" + " %s initparam\n" + " %s sw99param\n" + " %s resetstats\n" + " %s exit\n", name, name, name, name, name, name); + exit(1); +} + +int +main(int argc, char *argv[]) +{ + int start; + int interval; + unsigned long long param; + + progname = argv[0]; + if (argc < 2) + usage(); + + if (strncmp(argv[1], "ivlb", 5) == 0) { + if (argc != 3) usage(); + ivlb((unsigned long)atoi(argv[2])); + } else if (strncmp(argv[1], "ivle", 5) == 0) { + if (argc != 3) usage(); + ivle((unsigned long)atoi(argv[2])); + } else if (strncmp(argv[1], "exit", 5) == 0) { + if (argc != 2) usage(); + m5exit(); + } else if (strncmp(argv[1], "initparam", 10) == 0) { + if (argc != 2) usage(); + printf("%d", initparam()); + } else if (strncmp(argv[1], "sw99param", 10) == 0) { + if (argc != 2) usage(); + + param = initparam(); + // run-time, rampup-time, rampdown-time, warmup-time, connections + printf("%d %d %d %d %d", (param >> 48) & 0xfff, + (param >> 36) & 0xfff, (param >> 24) & 0xfff, + (param >> 12) & 0xfff, (param >> 0) & 0xfff); + } else if (strncmp(argv[1], "resetstats", 11) == 0) { + if (argc != 2) usage(); + resetstats(); + } + + return 0; +} diff --git a/util/m5/m5op.h b/util/m5/m5op.h new file mode 100644 index 0000000000..53de3144db --- /dev/null +++ b/util/m5/m5op.h @@ -0,0 +1,11 @@ +#ifndef __M5OP_H__ +#define __M5OP_H__ + +void arm(unsigned long address); +void quiesce(); +void ivlb(unsigned long interval); +void ivle(unsigned long interval); +void m5exit(); +unsigned long initparam(); + +#endif // __M5OP_H__ diff --git a/util/m5/m5op.s b/util/m5/m5op.s new file mode 100644 index 0000000000..fb92bfb9ae --- /dev/null +++ b/util/m5/m5op.s @@ -0,0 +1,66 @@ +#include +#include + +#define m5_op 0x01 +#define arm_func 0x00 +#define quiesce_func 0x01 +#define ivlb_func 0x10 +#define ivle_func 0x11 +#define m5exit_func 0x20 +#define initparam_func 0x30 +#define resetstats_func 0x40 + +#define INST(op, ra, rb, func) \ + .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func)) + +#define ARM(reg) INST(m5_op, reg, 0, arm_func) +#define QUIESCE() INST(m5_op, 0, 0, quiesce_func) +#define IVLB(reg) INST(m5_op, reg, 0, ivlb_func) +#define IVLE(reg) INST(m5_op, reg, 0, ivle_func) +#define M5_EXIT() INST(m5_op, 0, 0, m5exit_func) +#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func) +#define RESETSTATS() INST(m5_op, 0, 0, resetstats_func) + + .set noreorder + + .align 4 +LEAF(arm) + ARM(16) + RET +END(arm) + + .align 4 +LEAF(quiesce) + QUIESCE() + RET +END(quiesce) + + .align 4 +LEAF(ivlb) + IVLB(16) + RET +END(ivlb) + + .align 4 +LEAF(ivle) + IVLE(16) + RET +END(ivle) + + .align 4 +LEAF(m5exit) + M5_EXIT() + RET +END(m5exit) + + .align 4 +LEAF(initparam) + INITPARAM(0) + RET +END(initparam) + + .align 4 +LEAF(resetstats) + RESETSTATS() + RET +END(resetstats) \ No newline at end of file From 6cc2783217f175e26040cf818d464c7abb4379a8 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 1 Nov 2003 13:53:08 -0500 Subject: [PATCH 02/29] .cvsignore files don't really do anything for us anymore, so let's make bitkeeper ignore the stuff. --HG-- extra : convert_revision : 8ea2a403c7ba2a3c9bd44269a2c0ede9294c92d4 From c4dd30662be73ccfa75224bcdfcb7418462e82e5 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 1 Nov 2003 14:11:29 -0500 Subject: [PATCH 03/29] Licenses --HG-- extra : convert_revision : ce47fdfaa5c59480a1fb38d86eed7d16ab7b5fc1 --- util/m5/m5.c | 28 ++++++++++++++++++++++++++++ util/m5/m5op.h | 28 ++++++++++++++++++++++++++++ util/m5/m5op.s | 30 +++++++++++++++++++++++++++++- 3 files changed, 85 insertions(+), 1 deletion(-) diff --git a/util/m5/m5.c b/util/m5/m5.c index 4bd515c5d0..d17faf90be 100644 --- a/util/m5/m5.c +++ b/util/m5/m5.c @@ -1,3 +1,31 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include #include diff --git a/util/m5/m5op.h b/util/m5/m5op.h index 53de3144db..ee24f69486 100644 --- a/util/m5/m5op.h +++ b/util/m5/m5op.h @@ -1,3 +1,31 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #ifndef __M5OP_H__ #define __M5OP_H__ diff --git a/util/m5/m5op.s b/util/m5/m5op.s index fb92bfb9ae..18efbc9590 100644 --- a/util/m5/m5op.s +++ b/util/m5/m5op.s @@ -1,3 +1,31 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #include #include @@ -63,4 +91,4 @@ END(initparam) LEAF(resetstats) RESETSTATS() RET -END(resetstats) \ No newline at end of file +END(resetstats) From 2fd2ed16f7c7ed9f5fe6282c7643cb2e6019825b Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 1 Nov 2003 16:26:19 -0500 Subject: [PATCH 04/29] gah! how did this ever work? time uses Tick, not unsigned! --HG-- extra : convert_revision : caf246d12be97988573d4775325a41ff94c9afe1 From a6a5df529e53eb41db3d9c2d95579934f77cb985 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sat, 1 Nov 2003 17:53:39 -0500 Subject: [PATCH 05/29] Factor out the client/server network part into its own .ini file that we #include and add a DUMPFILE option for dumping a ethertrace --HG-- extra : convert_revision : 96fec0710a6f788890f3764e4ef078d53723c6dd From 249aaff32970dac250dbee3cb3ea531e60348933 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Sat, 1 Nov 2003 18:17:46 -0500 Subject: [PATCH 06/29] statistics.hh: add enum to Bin::VectorBin base/statistics.hh: add enum to Bin::VectorBin --HG-- extra : convert_revision : a05aef30ca85bf5c0d1f5155e1dff3fb34fd7777 --- base/statistics.hh | 1 + 1 file changed, 1 insertion(+) diff --git a/base/statistics.hh b/base/statistics.hh index 056adea57f..db08f14f73 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -2277,6 +2277,7 @@ struct StatBin : public GenBin int _size; public: + enum { binned = true }; VectorBin() : _size(0) {} bool initialized() const { return _size > 0; } From 095962c914448a5298d8dcba7758c3a0a1361734 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Sat, 1 Nov 2003 23:00:40 -0500 Subject: [PATCH 07/29] Fix overwritting and ordering issues with serialization routines dev/disk_image.cc: seperate serialization output files for different cow images --HG-- extra : convert_revision : b62551f8e3f6315bb92ae3cb44e077d8084cbfe7 --- dev/disk_image.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dev/disk_image.cc b/dev/disk_image.cc index 2fead00ad1..747e76965a 100644 --- a/dev/disk_image.cc +++ b/dev/disk_image.cc @@ -405,7 +405,7 @@ CowDiskImage::write(const uint8_t *data, off_t offset) void CowDiskImage::serialize(ostream &os) { - string cowFilename = serializeFilename + ".cow"; + string cowFilename = serializeFilename + "." + name() + ".cow"; SERIALIZE_SCALAR(cowFilename); save(cowFilename); } From f74dac9d9679ba3f21561718f90274c440b12227 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 00:35:31 -0500 Subject: [PATCH 08/29] Add basic.ini which is a barebones system that has nothing disk1.ini provides #defines that can be set to configure a second disk --HG-- extra : convert_revision : 0997063cd97dd66aea36402712998f65e23714b3 From 949a0634a486aaebfcb200952e0e98dfe961ca35 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Sun, 2 Nov 2003 01:07:43 -0500 Subject: [PATCH 09/29] iqueue.cc: don't clear stat fullCount in the constructor for iq. it comes cleared. --HG-- extra : convert_revision : 80e09cfbdebd67615892cd1178bb0f8cfb5fc04f From 1cd3757db92528bf1805fabe59db45f6359ab5b9 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 01:08:59 -0500 Subject: [PATCH 10/29] add several new functions that can be called from the guest to tell the simulator to do something. exit -> exit_old (deprecated exit now takes an optional parameter that tells it to execute at a specified time in the future The next four functions have two optional parameters. The first specifies a delay for how long to wait to issue the instruction. The second will tell the simulator to repeat that command at the specified interval. checkpoint will trigger a checkpoint dumpstats will cause the simulator to dump stats resetstats will cause all stats to be reset dumpreset will dump and reset stats all times are in nanoseconds util/m5/Makefile: Clean up to make it a bit easier to muck with util/m5/m5.c: Add a bunch of new commands and clean up the command parsing path Convert atoi to strtoul so that we can use 64bit numbers and even hex if we want to. (this runs on alpha, so a long is 64bit) util/m5/m5op.h: add prototypes for new m5 instructions use uint64_t since it's nicer --HG-- extra : convert_revision : 664ff00f0f0dfc5263c4e873d82fd9996a4521e9 --- util/m5/Makefile | 31 +++++++--- util/m5/m5.c | 158 +++++++++++++++++++++++++++++++++++++---------- util/m5/m5op.h | 16 +++-- util/m5/m5op.s | 51 +++++++++++---- 4 files changed, 199 insertions(+), 57 deletions(-) diff --git a/util/m5/Makefile b/util/m5/Makefile index f77a6cac3f..6e4ad31a36 100644 --- a/util/m5/Makefile +++ b/util/m5/Makefile @@ -1,13 +1,26 @@ +AS=as +CC=cc +LD=cc + +CCFLAGS=-O2 +#LDFLAGS=-non_shared + all: m5 -m5: m5.o m5op.o - cc -o m5 m5.o m5op.o - -m5op.o: m5op.s - as -o m5op.o m5op.s - -m5.o: m5.c - cc -c -o m5.o m5.c +m5: m5op.o m5.o + $(LD) $(LDFLAGS) -o $@ $> + strip $@ clean: - @rm -f m5 *.o *~ + @rm -f m5 *.o *.d *~ .#* + +.SUFFIXES: +.SUFFIXES:.o .c .s + +# C Compilation +.c.o: + $(CC) $(CCFLAGS) -o $@ -c $< + +# Assembly +.s.o: + $(AS) $(ASFLAGS) -o $@ $< diff --git a/util/m5/m5.c b/util/m5/m5.c index d17faf90be..1271bc9e17 100644 --- a/util/m5/m5.c +++ b/util/m5/m5.c @@ -26,9 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include - -#include +#include #include #include #include @@ -40,51 +38,149 @@ char *progname; void usage() { - char *name = basename(progname); - printf("usage: %s ivlb \n" - " %s ivle \n" - " %s initparam\n" - " %s sw99param\n" - " %s resetstats\n" - " %s exit\n", name, name, name, name, name, name); + printf("usage: m5 ivlb \n" + " m5 ivle \n" + " m5 initparam\n" + " m5 sw99param\n" + " m5 exit [delay]\n" + " m5 resetstats [delay [period]]\n" + " m5 dumpstats [delay [period]]\n" + " m5 dumpresetstats [delay [period]]\n" + " m5 checkpoint [delay [period]]\n" + "\n" + "All times in nanoseconds!\n"); exit(1); } +#define COMPARE(X) (strcmp(X, command) == 0) + int main(int argc, char *argv[]) { - int start; - int interval; - unsigned long long param; + char *command; + uint64_t param; + uint64_t arg1 = 0; + uint64_t arg2 = 0; progname = argv[0]; if (argc < 2) usage(); - if (strncmp(argv[1], "ivlb", 5) == 0) { - if (argc != 3) usage(); - ivlb((unsigned long)atoi(argv[2])); - } else if (strncmp(argv[1], "ivle", 5) == 0) { - if (argc != 3) usage(); - ivle((unsigned long)atoi(argv[2])); - } else if (strncmp(argv[1], "exit", 5) == 0) { - if (argc != 2) usage(); - m5exit(); - } else if (strncmp(argv[1], "initparam", 10) == 0) { - if (argc != 2) usage(); - printf("%d", initparam()); - } else if (strncmp(argv[1], "sw99param", 10) == 0) { - if (argc != 2) usage(); + command = argv[1]; + + if (COMPARE("ivlb")) { + if (argc != 3) + usage(); + + arg1 = strtoul(argv[2], NULL, 0); + ivlb(arg1); + return 0; + } + + if (COMPARE("ivle")) { + if (argc != 3) + usage(); + + arg1 = strtoul(argv[2], NULL, 0); + ivle(arg1); + return 0; + } + + if (COMPARE("initparam")) { + if (argc != 2) + usage(); + + printf("%ld", initparam()); + return 0; + } + + if (COMPARE("sw99param")) { + if (argc != 2) + usage(); param = initparam(); // run-time, rampup-time, rampdown-time, warmup-time, connections printf("%d %d %d %d %d", (param >> 48) & 0xfff, (param >> 36) & 0xfff, (param >> 24) & 0xfff, (param >> 12) & 0xfff, (param >> 0) & 0xfff); - } else if (strncmp(argv[1], "resetstats", 11) == 0) { - if (argc != 2) usage(); - resetstats(); + + return 0; } - return 0; + if (COMPARE("exit")) { + switch (argc) { + case 3: + arg1 = strtoul(argv[2], NULL, 0); + case 2: + m5exit(arg1); + return 0; + + default: + usage(); + } + } + + if (COMPARE("resetstats")) { + switch (argc) { + case 4: + arg2 = strtoul(argv[3], NULL, 0); + case 3: + arg1 = strtoul(argv[2], NULL, 0); + case 2: + reset_stats(arg1, arg2); + return 0; + + default: + usage(); + } + } + + if (COMPARE("dumpstats")) { + switch (argc) { + case 4: + arg2 = strtoul(argv[3], NULL, 0); + case 3: + arg1 = strtoul(argv[2], NULL, 0); + case 2: + dump_stats(arg1, arg2); + return 0; + + default: + usage(); + } + } + + if (COMPARE("dumpresetstats")) { + switch (argc) { + case 4: + arg2 = strtoul(argv[3], NULL, 0); + case 3: + arg1 = strtoul(argv[2], NULL, 0); + case 2: + dumpreset_stats(arg1, arg2); + return 0; + + default: + usage(); + } + } + + if (COMPARE("checkpoint")) { + switch (argc) { + case 4: + arg2 = strtoul(argv[3], NULL, 0); + case 3: + arg1 = strtoul(argv[2], NULL, 0); + case 2: + checkpoint(arg1, arg2); + return 0; + + default: + usage(); + } + + return 0; + } + + usage(); } diff --git a/util/m5/m5op.h b/util/m5/m5op.h index ee24f69486..266460ce96 100644 --- a/util/m5/m5op.h +++ b/util/m5/m5op.h @@ -29,11 +29,17 @@ #ifndef __M5OP_H__ #define __M5OP_H__ -void arm(unsigned long address); +#include + +void arm(uint64_t address); void quiesce(); -void ivlb(unsigned long interval); -void ivle(unsigned long interval); -void m5exit(); -unsigned long initparam(); +void ivlb(uint64_t interval); +void ivle(uint64_t interval); +void m5exit(uint64_t ns_delay); +uint64_t initparam(); +void checkpoint(uint64_t ns_delay, uint64_t ns_period); +void reset_stats(uint64_t ns_delay, uint64_t ns_period); +void dump_stats(uint64_t ns_delay, uint64_t ns_period); +void dumpreset_stats(uint64_t ns_delay, uint64_t ns_period); #endif // __M5OP_H__ diff --git a/util/m5/m5op.s b/util/m5/m5op.s index 18efbc9590..8004e66c65 100644 --- a/util/m5/m5op.s +++ b/util/m5/m5op.s @@ -30,13 +30,18 @@ #include #define m5_op 0x01 + #define arm_func 0x00 #define quiesce_func 0x01 #define ivlb_func 0x10 #define ivle_func 0x11 -#define m5exit_func 0x20 +#define exit_old_func 0x20 // deprectated! +#define exit_func 0x21 #define initparam_func 0x30 #define resetstats_func 0x40 +#define dumpstats_func 0x41 +#define dumprststats_func 0x42 +#define ckpt_func 0x43 #define INST(op, ra, rb, func) \ .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func)) @@ -45,9 +50,12 @@ #define QUIESCE() INST(m5_op, 0, 0, quiesce_func) #define IVLB(reg) INST(m5_op, reg, 0, ivlb_func) #define IVLE(reg) INST(m5_op, reg, 0, ivle_func) -#define M5_EXIT() INST(m5_op, 0, 0, m5exit_func) +#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func) #define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func) -#define RESETSTATS() INST(m5_op, 0, 0, resetstats_func) +#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func) +#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func) +#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func) +#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func) .set noreorder @@ -77,18 +85,37 @@ END(ivle) .align 4 LEAF(m5exit) - M5_EXIT() + M5EXIT(16) RET END(m5exit) - .align 4 + .align 4 LEAF(initparam) - INITPARAM(0) - RET + INITPARAM(0) + RET END(initparam) - .align 4 -LEAF(resetstats) - RESETSTATS() - RET -END(resetstats) + .align 4 +LEAF(reset_stats) + RESET_STATS(16, 17) + RET +END(reset_stats) + + .align 4 +LEAF(dump_stats) + DUMP_STATS(16, 17) + RET +END(dump_stats) + + .align 4 +LEAF(dumpreset_stats) + DUMPRST_STATS(16, 17) + RET +END(dumpreset_stats) + + .align 4 +LEAF(checkpoint) + CHECKPOINT(16, 17) + RET +END(checkpoint) + From c7d6745b073982782eb05ca523b53e1c7fe784da Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 02:07:31 -0500 Subject: [PATCH 11/29] deprecate the m5exit instruction and rename it to m5exit_old Implement a new m5exit instruction with an optional delay arch/alpha/isa_desc: move m5exit to m5exit old. The old version of the instruction is now deprecated Implement the new exit instruction with the optional delay sim/sim_events.cc: sim/sim_events.hh: Make SimExit take a cycle sim/universe.cc: provide ticksPerMS, ticksPerUS, and ticksPerNS so we don't have to do math during the cycle --HG-- extra : convert_revision : e2ed47a2e5cfcd57c82086c6fcb4a28bf801c214 --- arch/alpha/isa_desc | 16 ++++++++++++++-- sim/sim_events.cc | 4 ++-- sim/sim_events.hh | 2 +- sim/universe.cc | 8 +++++++- 4 files changed, 24 insertions(+), 6 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 75f7650292..09fb4a50a7 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2425,9 +2425,21 @@ decode OPCODE default Unknown::unknown() { if (!xc->misspeculating()) Annotate::EndInterval(xc); }}, No_OpClass); - 0x20: m5exit({{ + 0x20: m5exit_old({{ if (!xc->misspeculating()) - SimExit("m5_exit instruction encountered"); + SimExit(curTick, "m5_exit_old instruction encountered"); + }}, No_OpClass); + 0x21: m5exit({{ + if (!xc->misspeculating()) { + Tick when = curTick; + Tick delay = xc->regs.intRegFile[16]; + if (delay != 0) { + delay *= ticksPerUS; + delay /= 1000; + when += delay; + } + SimExit(when, "m5_exit instruction encountered"); + } }}, No_OpClass); 0x30: initparam({{ Ra = xc->cpu->system->init_param; }}); 0x40: resetstats({{ diff --git a/sim/sim_events.cc b/sim/sim_events.cc index 5f24de5161..165bab2bf1 100644 --- a/sim/sim_events.cc +++ b/sim/sim_events.cc @@ -64,9 +64,9 @@ SimExitEvent::description() } void -SimExit(const char *message) +SimExit(Tick when, const char *message) { - static SimExitEvent event(message); + static SimExitEvent event(when, message); } // diff --git a/sim/sim_events.hh b/sim/sim_events.hh index 0029a8404d..bca978ce11 100644 --- a/sim/sim_events.hh +++ b/sim/sim_events.hh @@ -66,7 +66,7 @@ class SimExitEvent : public Event virtual const char *description(); }; -void SimExit(const char *message); +void SimExit(Tick when, const char *message); // // Event class to terminate simulation after 'n' related events have diff --git a/sim/universe.cc b/sim/universe.cc index 8274d84ca6..4cfcdc563f 100644 --- a/sim/universe.cc +++ b/sim/universe.cc @@ -38,6 +38,9 @@ using namespace std; Tick curTick = 0; Tick ticksPerSecond; +Tick ticksPerMS; +Tick ticksPerUS; +Tick ticksPerNS; class UniverseParamContext : public ParamContext { @@ -49,10 +52,13 @@ class UniverseParamContext : public ParamContext UniverseParamContext universe("Universe"); Param universe_freq(&universe, "frequency", "tick frequency", - 200000000); + 200000000); void UniverseParamContext::checkParams() { ticksPerSecond = universe_freq; + ticksPerMS = universe_freq / 1000; + ticksPerUS = universe_freq / (1000 * 1000); + ticksPerNS = universe_freq / (1000 * 1000 * 1000); } From 03ef1a0c0938c596ea5dc48e11c111d2c5c78903 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 02:13:04 -0500 Subject: [PATCH 12/29] If a filter isn't specified, don't try to do any filtering If pcap_lookupnet fails, just assume the netmask is 0xffffff00 that's all we really wanted from it anyway. --HG-- extra : convert_revision : ac0a390ddb7a6b0a4e4c6d2885bfa7bd059faf36 --- util/tap/tap.cc | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/util/tap/tap.cc b/util/tap/tap.cc index 7121ebcbb9..2932cec35d 100644 --- a/util/tap/tap.cc +++ b/util/tap/tap.cc @@ -200,7 +200,7 @@ main(int argc, char *argv[]) int bufsize = 2000; bool listening = false; char *device = NULL; - char *filter = ""; + char *filter = NULL; char c; int daemon = false; string host; @@ -274,16 +274,20 @@ main(int argc, char *argv[]) if (pcap == NULL) panic("pcap_open_live failed: %s\n", errbuf); - bpf_program program; - bpf_u_int32 localnet, netmask; - if (pcap_lookupnet(device, &localnet, &netmask, errbuf) == -1) - panic("pcap_lookupnet failed: %s\n", errbuf); + if (filter) { + bpf_program program; + bpf_u_int32 localnet, netmask; + if (pcap_lookupnet(device, &localnet, &netmask, errbuf) == -1) { + DPRINTF("pcap_lookupnet failed: %s\n", errbuf); + netmask = 0xffffff00; + } - if (pcap_compile(pcap, &program, filter, 1, netmask) == -1) - panic("pcap_compile failed, invalid filter:\n%s\n", filter); + if (pcap_compile(pcap, &program, filter, 1, netmask) == -1) + panic("pcap_compile failed, invalid filter:\n%s\n", filter); - if (pcap_setfilter(pcap, &program) == -1) - panic("pcap_setfilter failed\n"); + if (pcap_setfilter(pcap, &program) == -1) + panic("pcap_setfilter failed\n"); + } eth_t *ethernet = eth_open(device); if (!ethernet) From 780b3b4bcd575d5145204037901f751e01f42cd2 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 13:01:08 -0500 Subject: [PATCH 13/29] SimExit takes a time now arch/alpha/isa_desc: regen --HG-- extra : convert_revision : a9da9d2a5fc8a0414491e437747cde48dfb61a20 --- arch/alpha/isa_desc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 09fb4a50a7..aaf0cb0a76 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2364,7 +2364,7 @@ decode OPCODE default Unknown::unknown() { format EmulatedCallPal { 0x00: halt ({{ if (!xc->misspeculating()) - SimExit("halt instruction encountered"); + SimExit(curTick, "halt instruction encountered"); }}); 0x83: callsys({{ if (!xc->misspeculating()) From 3e87070209b5c4003ac643b5ba6c3081ff0454fe Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 13:05:14 -0500 Subject: [PATCH 14/29] Prevent make from being smart about sccs --HG-- extra : convert_revision : d9fdb32c87c8511aace91850867fc00d00855fe6 From 667cbb6690b1f4af68ab7dad8caed8cdf107a090 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 18:02:58 -0500 Subject: [PATCH 15/29] Implement more m5 pseduo opcodes: resetstats dumpstats dumpresetstats m5checkpoint Lots of cleanup of serialization and stats dumping/resetting to work with these new instructions arch/alpha/isa_desc: Implement more m5 pseduo opcodes: resetstats dumpstats dumpresetstats m5checkpoint All of these functions take two optional parameters, the first is a delay, and the second is a period. The delay tells the simulator to wait the specified number of nanoseconds before triggering the event, the period tells the simulator to repeat the event with a specified frequency base/statistics.cc: base/statistics.hh: regReset RegResetCallback dev/disk_image.cc: serializeFilename -> CheckpointFile() sim/debug.cc: Move this debugging statement to sim_stats.cc sim/eventq.cc: Don't AutoDelete an event if it is scheduled since the process() function could potentially schedule the event again. sim/main.cc: DumpStatsEvent is now Statistics::SetupEvent(Dump, curTick) sim/serialize.cc: Change the serialize event so that it's possible to cause the event to repeat. Also make the priority such that the event happens just before the simulator would exit if both events were scheduled for the same cycle. get rid of the serializeFilename variable and provide a CheckpointFile() function. This function takes a basename that is set in the configuration, and appends the current cycle to the name so that multiple checkpoints can be dumped from the same simulation. Also, don't exit the simulation when a checkpoint file is dumped. sim/serialize.hh: serializeFilename -> CheckpointFile() SetupCheckpoint function to tell the simulator to prepare to checkpoint at a certain time with a certain period sim/sim_events.cc: DumpStatsEvent stuff gets move to sim_stats.(cc|hh) The context stuff gets moved into the already existing stats context in stat_context.cc sim/sim_events.hh: DumpStatsEvent stuff gets move to sim_stats.(cc|hh) sim/universe.cc: Provide some simple functions for converting times into ticks. These use floating point math to get as close as possible to the real values. Multipliers are set up ahead of time --HG-- extra : convert_revision : d06ef26a9237529a1e5060cb1ac2dcc04d4ec252 --- arch/alpha/isa_desc | 56 +++++++++++++++++++++++++++----- base/statistics.cc | 2 +- base/statistics.hh | 2 +- dev/disk_image.cc | 2 +- sim/debug.cc | 5 --- sim/eventq.cc | 2 +- sim/main.cc | 4 ++- sim/serialize.cc | 79 +++++++++++++++++++++++++++------------------ sim/serialize.hh | 5 +-- sim/sim_events.cc | 41 ----------------------- sim/sim_events.hh | 24 -------------- sim/universe.cc | 13 ++++---- 12 files changed, 112 insertions(+), 123 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index aaf0cb0a76..e34739b864 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -28,7 +28,9 @@ let {{ #include "cpu/simple_cpu/simple_cpu.hh" #include "cpu/static_inst.hh" #include "sim/annotation.hh" +#include "sim/serialize.hh" #include "sim/sim_events.hh" +#include "sim/sim_stats.hh" #ifdef FULL_SYSTEM #include "targetarch/ev5.hh" @@ -2431,20 +2433,58 @@ decode OPCODE default Unknown::unknown() { }}, No_OpClass); 0x21: m5exit({{ if (!xc->misspeculating()) { - Tick when = curTick; Tick delay = xc->regs.intRegFile[16]; - if (delay != 0) { - delay *= ticksPerUS; - delay /= 1000; - when += delay; - } + Tick when = curTick + NS2Ticks(delay); SimExit(when, "m5_exit instruction encountered"); } }}, No_OpClass); 0x30: initparam({{ Ra = xc->cpu->system->init_param; }}); 0x40: resetstats({{ - if (!xc->misspeculating()) - Statistics::reset(); + if (!xc->misspeculating()) { + using namespace Statistics; + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Reset, when, repeat); + } + }}); + 0x41: dumpstats({{ + if (!xc->misspeculating()) { + using namespace Statistics; + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Dump, when, repeat); + } + }}); + 0x42: dumpresetstats({{ + if (!xc->misspeculating()) { + using namespace Statistics; + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Dump|Reset, when, repeat); + } + }}); + 0x43: m5checkpoint({{ + if (!xc->misspeculating()) { + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupCheckpoint(when, repeat); + } }}); } } diff --git a/base/statistics.cc b/base/statistics.cc index 8b2d8e5de5..c1a5b2626e 100644 --- a/base/statistics.cc +++ b/base/statistics.cc @@ -919,7 +919,7 @@ dump(ostream &stream) CallbackQueue resetQueue; void -regReset(Callback *cb) +RegResetCallback(Callback *cb) { resetQueue.add(cb); } diff --git a/base/statistics.hh b/base/statistics.hh index db08f14f73..2fe6988b0a 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -2763,7 +2763,7 @@ class Formula : public Detail::VectorStat void check(); void dump(std::ostream &stream); void reset(); -void regReset(Callback *cb); +void RegResetCallback(Callback *cb); inline Detail::Temp operator+(Detail::Temp l, Detail::Temp r) diff --git a/dev/disk_image.cc b/dev/disk_image.cc index 747e76965a..a1a220de14 100644 --- a/dev/disk_image.cc +++ b/dev/disk_image.cc @@ -405,7 +405,7 @@ CowDiskImage::write(const uint8_t *data, off_t offset) void CowDiskImage::serialize(ostream &os) { - string cowFilename = serializeFilename + "." + name() + ".cow"; + string cowFilename = CheckpointFile() + "." + name() + ".cow"; SERIALIZE_SCALAR(cowFilename); save(cowFilename); } diff --git a/sim/debug.cc b/sim/debug.cc index b18642942c..95187baff1 100644 --- a/sim/debug.cc +++ b/sim/debug.cc @@ -125,11 +125,6 @@ extern "C" void sched_break_cycle(Tick when) new DebugBreakEvent(&mainEventQueue, when); } -extern "C" void dump_stats() -{ - new DumpStatsEvent(); -} - extern "C" void eventq_dump() { mainEventQueue.dump(); diff --git a/sim/eventq.cc b/sim/eventq.cc index fda587dcb1..52f7dfaff1 100644 --- a/sim/eventq.cc +++ b/sim/eventq.cc @@ -112,7 +112,7 @@ EventQueue::serviceOne() else event->clearFlags(Event::Squashed); - if (event->getFlags(Event::AutoDelete)) + if (event->getFlags(Event::AutoDelete) && !event->scheduled()) delete event; } diff --git a/sim/main.cc b/sim/main.cc index ce9ef58194..addedbc852 100644 --- a/sim/main.cc +++ b/sim/main.cc @@ -400,7 +400,9 @@ main(int argc, char **argv) async_event = false; if (async_dump) { async_dump = false; - new DumpStatsEvent(); + + using namespace Statistics; + SetupEvent(Dump, curTick); } if (async_exit) { diff --git a/sim/serialize.cc b/sim/serialize.cc index 84d400e164..bd528c678e 100644 --- a/sim/serialize.cc +++ b/sim/serialize.cc @@ -245,14 +245,14 @@ Serializer::add_objects() } void -Serializer::serialize(const string &f) +Serializer::serialize() { if (Serializeable::serializer != NULL) panic("in process of serializing!"); Serializeable::serializer = this; - file = f; + file = CheckpointFile(); string cpt_file = file + ".cpt"; output = new ofstream(cpt_file.c_str()); time_t t = time(NULL); @@ -286,38 +286,49 @@ class SerializeEvent : public Event { protected: string file; + Tick repeat; public: - SerializeEvent(EventQueue *q, Tick when, const string &file); - ~SerializeEvent(); - + SerializeEvent(Tick _when, Tick _repeat); virtual void process(); - virtual void serialize(std::ostream &os); + virtual void serialize(std::ostream &os) + { + panic("Cannot serialize the SerializeEvent"); + } + }; -SerializeEvent::SerializeEvent(EventQueue *q, Tick when, const string &f) - : Event(q), file(f) +SerializeEvent::SerializeEvent(Tick _when, Tick _repeat) + : Event(&mainEventQueue, 990), repeat(_repeat) { setFlags(AutoDelete); - schedule(when); -} - -SerializeEvent::~SerializeEvent() -{ + schedule(_when); } void SerializeEvent::process() { Serializer serial; - serial.serialize(file); - new SimExitEvent("Serialization caused exit"); + serial.serialize(); + if (repeat) + schedule(curTick + repeat); +} + +string __CheckpointFileBase; + +string +CheckpointFile() +{ + if (__CheckpointFileBase.empty()) + return __CheckpointFileBase; + + return csprintf("%s.%d", __CheckpointFileBase, curTick); } void -SerializeEvent::serialize(ostream &os) +SetupCheckpoint(Tick when, Tick period) { - panic("Cannot serialize the SerializeEvent"); + new SerializeEvent(when, period); } class SerializeParamContext : public ParamContext @@ -333,18 +344,21 @@ class SerializeParamContext : public ParamContext SerializeParamContext serialParams("serialize"); +Param serialize_file(&serialParams, + "file", + "file to write to", "m5"); + Param serialize_cycle(&serialParams, "cycle", "cycle to serialize", 0); -Param serialize_file(&serialParams, - "file", - "file to write to", ""); +Param serialize_period(&serialParams, + "period", + "period to repeat serializations", + 0); + -// Copy filename into regular string so we can export it without -// having to include param.hh all over the place. -string serializeFilename; SerializeParamContext::SerializeParamContext(const string §ion) : ParamContext(section), event(NULL) @@ -357,22 +371,23 @@ SerializeParamContext::~SerializeParamContext() void SerializeParamContext::checkParams() { - serializeFilename = serialize_file; - if (!serializeFilename.empty() && serialize_cycle > 0) - event = new SerializeEvent(&mainEventQueue, serialize_cycle, - serializeFilename); + __CheckpointFileBase = serialize_file; + if (serialize_cycle > 0) + SetupCheckpoint(serialize_cycle, serialize_period); } void -debug_serialize(const char *file) +debug_serialize() { Serializer serial; - serial.serialize(file); - new SimExitEvent("Serialization caused exit"); + serial.serialize(); } - - +void +debug_serialize(Tick when) +{ + new SerializeEvent(when, 0); +} //////////////////////////////////////////////////////////////////////// // diff --git a/sim/serialize.hh b/sim/serialize.hh index a8fff7b6f5..78cbb702a7 100644 --- a/sim/serialize.hh +++ b/sim/serialize.hh @@ -148,7 +148,7 @@ class Serializer void add_objects(); public: - void serialize(const std::string &file); + void serialize(); const std::string &filename() const { return file; } }; @@ -251,6 +251,7 @@ class Checkpoint // Export checkpoint filename param so other objects can derive // filenames from it (e.g., memory). // -extern std::string serializeFilename; +std::string CheckpointFile(); +void SetupCheckpoint(Tick when, Tick period = 0); #endif // __SERIALIZE_HH__ diff --git a/sim/sim_events.cc b/sim/sim_events.cc index 165bab2bf1..265bf63dc0 100644 --- a/sim/sim_events.cc +++ b/sim/sim_events.cc @@ -103,20 +103,6 @@ CountedExitEvent::description() return "counted exit"; } - -void -DumpStatsEvent::process() -{ - dumpStats(); -} - -const char * -DumpStatsEvent::description() -{ - return "stats dump"; -} - - #ifdef CHECK_SWAP_CYCLES new CheckSwapEvent(&mainEventQueue, CHECK_SWAP_CYCLES); #endif @@ -148,33 +134,6 @@ CheckSwapEvent::description() } -class DumpStatsContext : public ParamContext -{ - public: - DumpStatsContext(const string &_iniSection) - : ParamContext(_iniSection) {} - void checkParams(); -}; - -DumpStatsContext dumpStatsParams("stats"); - -VectorParam dump_cycle(&dumpStatsParams, "dump_cycles", - "cycles on which to dump stats"); - -void -DumpStatsContext::checkParams() -{ - if (dump_cycle.isValid()) { - vector &cycles = dump_cycle; - - vector::iterator i = cycles.begin(); - vector::iterator end = cycles.end(); - - for (; i < end; ++i) - new DumpStatsEvent(*i); - } -} - /////////////////////////////////////////////////// // // Simulation termination parameters diff --git a/sim/sim_events.hh b/sim/sim_events.hh index bca978ce11..8a420e419f 100644 --- a/sim/sim_events.hh +++ b/sim/sim_events.hh @@ -91,30 +91,6 @@ class CountedExitEvent : public Event // // Event to cause a statistics dump // -class DumpStatsEvent : public Event -{ - public: - DumpStatsEvent() - : Event(&mainEventQueue) - { setFlags(AutoDelete); schedule(curTick, 999); } - - DumpStatsEvent(EventQueue *q) - : Event(q) - { setFlags(AutoDelete); schedule(curTick, 999); } - - DumpStatsEvent(Tick when) - : Event(&mainEventQueue) - { setFlags(AutoDelete); schedule(when, 999); } - - DumpStatsEvent(EventQueue *q, Tick when) - : Event(q) - { setFlags(AutoDelete); schedule(when, 999); } - - void process(); - - virtual const char *description(); -}; - class CheckSwapEvent : public Event { private: diff --git a/sim/universe.cc b/sim/universe.cc index 4cfcdc563f..b75b1f78af 100644 --- a/sim/universe.cc +++ b/sim/universe.cc @@ -38,9 +38,9 @@ using namespace std; Tick curTick = 0; Tick ticksPerSecond; -Tick ticksPerMS; -Tick ticksPerUS; -Tick ticksPerNS; +double __ticksPerMS; +double __ticksPerUS; +double __ticksPerNS; class UniverseParamContext : public ParamContext { @@ -58,7 +58,8 @@ void UniverseParamContext::checkParams() { ticksPerSecond = universe_freq; - ticksPerMS = universe_freq / 1000; - ticksPerUS = universe_freq / (1000 * 1000); - ticksPerNS = universe_freq / (1000 * 1000 * 1000); + double freq = double(ticksPerSecond); + __ticksPerMS = freq / 1.0e3; + __ticksPerUS = freq / 1.0e6; + __ticksPerNS = freq / 1.0e9; } From c6ffba9fa2729e177c5efd90c6b63d13dbca414a Mon Sep 17 00:00:00 2001 From: Steve Raasch Date: Sun, 2 Nov 2003 19:29:14 -0500 Subject: [PATCH 16/29] Add binning support --HG-- extra : convert_revision : edb922d3a4422cedc5c0c7efbac7124b5184165f From 34620649de5ff2b8cd33dac46fed8a1d07971587 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Sun, 2 Nov 2003 19:38:22 -0500 Subject: [PATCH 17/29] General fixes for Sampling CPU in full system mode, and serialization of sampling CPU cpu/intr_control.cc: Fix the reference to the cpu, to look up which cpu is being used In sampling mode can't use an absolute pointer to the cpu, use the exeContexts vector cpu/intr_control.hh: Add two new functions to simplify MP interrupts, fix it for sampling CPU model --HG-- extra : convert_revision : a69cdbb81e6aefa3fd5385416713c689300bbea8 --- cpu/intr_control.cc | 38 +++++++++++++++++++++++++++++++++++++- cpu/intr_control.hh | 14 ++++++-------- 2 files changed, 43 insertions(+), 9 deletions(-) diff --git a/cpu/intr_control.cc b/cpu/intr_control.cc index 037b00ef4d..c71a36b6f6 100644 --- a/cpu/intr_control.cc +++ b/cpu/intr_control.cc @@ -40,6 +40,42 @@ IntrControl::IntrControl(const string &name, BaseCPU *c) : SimObject(name), cpu(c) {} +/* @todo + *Fix the cpu sim object parameter to be a system pointer + *instead, to avoid some extra dereferencing + */ +void +IntrControl::post(int int_num, int index) +{ + std::vector &xcvec = cpu->system->execContexts; + BaseCPU *temp = xcvec[0]->cpu; + temp->post_interrupt(int_num, index); +} + +void +IntrControl::post(int cpu_id, int int_num, int index) +{ + std::vector &xcvec = cpu->system->execContexts; + BaseCPU *temp = xcvec[cpu_id]->cpu; + temp->post_interrupt(int_num, index); +} + +void +IntrControl::clear(int int_num, int index) +{ + std::vector &xcvec = cpu->system->execContexts; + BaseCPU *temp = xcvec[0]->cpu; + temp->clear_interrupt(int_num, index); +} + +void +IntrControl::clear(int cpu_id, int int_num, int index) +{ + std::vector &xcvec = cpu->system->execContexts; + BaseCPU *temp = xcvec[cpu_id]->cpu; + temp->clear_interrupt(int_num, index); +} + BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl) SimObjectParam cpu; @@ -48,7 +84,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(IntrControl) BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl) - INIT_PARAM(cpu, "the processor") + INIT_PARAM(cpu, "the cpu") END_INIT_SIM_OBJECT_PARAMS(IntrControl) diff --git a/cpu/intr_control.hh b/cpu/intr_control.hh index b8fa68f521..37e62ed002 100644 --- a/cpu/intr_control.hh +++ b/cpu/intr_control.hh @@ -29,9 +29,13 @@ #ifndef __INTR_CONTROL_HH__ #define __INTR_CONTROL_HH__ +#include #include "base/misc.hh" #include "cpu/base_cpu.hh" #include "sim/sim_object.hh" +#include "sim/system.hh" +#include "cpu/exec_context.hh" + class IntrControl : public SimObject { @@ -41,16 +45,10 @@ class IntrControl : public SimObject void clear(int int_num, int index = 0); void post(int int_num, int index = 0); + void clear(int cpu_id, int int_num, int index); + void post(int cpu_id, int int_num, int index); }; -inline void -IntrControl::post(int int_num, int index) -{ cpu->post_interrupt(int_num, index); } - -inline void -IntrControl::clear(int int_num, int index) -{ cpu->clear_interrupt(int_num, index); } - #endif // __INTR_CONTROL_HH__ From d76445f9f37896227f1d4e61348a418aa7ab6371 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 20:43:39 -0500 Subject: [PATCH 18/29] Move the m5 pseudo instructions into their own file arch/alpha/isa_desc: Move the pseudo instructions out of the isa_desc, into their own file and call out to them when they're to be accessed sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: move SimExit to sim_exit.cc --HG-- extra : convert_revision : 1c393adb1c18bd0fef065057d7f4e9cf60ac4197 --- arch/alpha/isa_desc | 63 ++++++------------------ arch/alpha/pseudo_inst.cc | 101 ++++++++++++++++++++++++++++++++++++++ arch/alpha/pseudo_inst.hh | 39 +++++++++++++++ sim/sim_events.cc | 6 --- sim/sim_events.hh | 2 - sim/sim_exit.hh | 3 ++ 6 files changed, 157 insertions(+), 57 deletions(-) create mode 100644 arch/alpha/pseudo_inst.cc create mode 100644 arch/alpha/pseudo_inst.hh diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index e34739b864..ec9fd183a8 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -28,12 +28,11 @@ let {{ #include "cpu/simple_cpu/simple_cpu.hh" #include "cpu/static_inst.hh" #include "sim/annotation.hh" -#include "sim/serialize.hh" -#include "sim/sim_events.hh" -#include "sim/sim_stats.hh" +#include "sim/sim_exit.hh" #ifdef FULL_SYSTEM -#include "targetarch/ev5.hh" +#include "arch/alpha/ev5.hh" +#include "arch/alpha/pseudo_inst.hh" #endif namespace AlphaISA; @@ -2429,62 +2428,28 @@ decode OPCODE default Unknown::unknown() { }}, No_OpClass); 0x20: m5exit_old({{ if (!xc->misspeculating()) - SimExit(curTick, "m5_exit_old instruction encountered"); + AlphaPseudo::m5exit_old(xc); }}, No_OpClass); 0x21: m5exit({{ - if (!xc->misspeculating()) { - Tick delay = xc->regs.intRegFile[16]; - Tick when = curTick + NS2Ticks(delay); - SimExit(when, "m5_exit instruction encountered"); - } + if (!xc->misspeculating()) + AlphaPseudo::m5exit(xc); }}, No_OpClass); 0x30: initparam({{ Ra = xc->cpu->system->init_param; }}); 0x40: resetstats({{ - if (!xc->misspeculating()) { - using namespace Statistics; - Tick delay = xc->regs.intRegFile[16]; - Tick period = xc->regs.intRegFile[17]; - - Tick when = curTick + NS2Ticks(delay); - Tick repeat = NS2Ticks(period); - - SetupEvent(Reset, when, repeat); - } + if (!xc->misspeculating()) + AlphaPseudo::resetstats(xc); }}); 0x41: dumpstats({{ - if (!xc->misspeculating()) { - using namespace Statistics; - Tick delay = xc->regs.intRegFile[16]; - Tick period = xc->regs.intRegFile[17]; - - Tick when = curTick + NS2Ticks(delay); - Tick repeat = NS2Ticks(period); - - SetupEvent(Dump, when, repeat); - } + if (!xc->misspeculating()) + AlphaPseudo::dumpstats(xc); }}); 0x42: dumpresetstats({{ - if (!xc->misspeculating()) { - using namespace Statistics; - Tick delay = xc->regs.intRegFile[16]; - Tick period = xc->regs.intRegFile[17]; - - Tick when = curTick + NS2Ticks(delay); - Tick repeat = NS2Ticks(period); - - SetupEvent(Dump|Reset, when, repeat); - } + if (!xc->misspeculating()) + AlphaPseudo::dumpresetstats(xc); }}); 0x43: m5checkpoint({{ - if (!xc->misspeculating()) { - Tick delay = xc->regs.intRegFile[16]; - Tick period = xc->regs.intRegFile[17]; - - Tick when = curTick + NS2Ticks(delay); - Tick repeat = NS2Ticks(period); - - SetupCheckpoint(when, repeat); - } + if (!xc->misspeculating()) + AlphaPseudo::m5checkpoint(xc); }}); } } diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc new file mode 100644 index 0000000000..1f24a07f58 --- /dev/null +++ b/arch/alpha/pseudo_inst.cc @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "arch/alpha/pseudo_inst.hh" +#include "cpu/exec_context.hh" +#include "sim/serialize.hh" +#include "sim/sim_exit.hh" +#include "sim/sim_stats.hh" + +using namespace Statistics; + +namespace AlphaPseudo +{ + void + m5exit_old(ExecContext *xc) + { + SimExit(curTick, "m5_exit_old instruction encountered"); + } + + void + m5exit(ExecContext *xc) + { + Tick delay = xc->regs.intRegFile[16]; + Tick when = curTick + NS2Ticks(delay); + SimExit(when, "m5_exit instruction encountered"); + } + + void + resetstats(ExecContext *xc) + { + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Reset, when, repeat); + } + + void + dumpstats(ExecContext *xc) + { + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Dump, when, repeat); + } + + void + dumpresetstats(ExecContext *xc) + { + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupEvent(Dump|Reset, when, repeat); + } + + void + m5checkpoint(ExecContext *xc) + { + Tick delay = xc->regs.intRegFile[16]; + Tick period = xc->regs.intRegFile[17]; + + Tick when = curTick + NS2Ticks(delay); + Tick repeat = NS2Ticks(period); + + SetupCheckpoint(when, repeat); + } + +} diff --git a/arch/alpha/pseudo_inst.hh b/arch/alpha/pseudo_inst.hh new file mode 100644 index 0000000000..b212a392cf --- /dev/null +++ b/arch/alpha/pseudo_inst.hh @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2003 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +class ExecContext; + +namespace AlphaPseudo +{ + void m5exit(ExecContext *xc); + void m5exit_old(ExecContext *xc); + void resetstats(ExecContext *xc); + void dumpstats(ExecContext *xc); + void dumpresetstats(ExecContext *xc); + void m5checkpoint(ExecContext *xc); +} diff --git a/sim/sim_events.cc b/sim/sim_events.cc index 265bf63dc0..98d3b086de 100644 --- a/sim/sim_events.cc +++ b/sim/sim_events.cc @@ -63,12 +63,6 @@ SimExitEvent::description() return "simulation termination"; } -void -SimExit(Tick when, const char *message) -{ - static SimExitEvent event(when, message); -} - // // constructor: automatically schedules at specified time // diff --git a/sim/sim_events.hh b/sim/sim_events.hh index 8a420e419f..c4db248e00 100644 --- a/sim/sim_events.hh +++ b/sim/sim_events.hh @@ -66,8 +66,6 @@ class SimExitEvent : public Event virtual const char *description(); }; -void SimExit(Tick when, const char *message); - // // Event class to terminate simulation after 'n' related events have // occurred using a shared counter: used to terminate when *all* diff --git a/sim/sim_exit.hh b/sim/sim_exit.hh index 847d9eb10e..9a8b22d51a 100644 --- a/sim/sim_exit.hh +++ b/sim/sim_exit.hh @@ -31,11 +31,14 @@ #include +#include "sim/host.hh" + class Callback; void registerExitCallback(Callback *); void exitNow(const std::string &cause, int exit_code); void exitNow(const char *cause, int exit_code); +void SimExit(Tick when, const char *message); #endif // __SIM_EXIT_HH__ From 136ee73a58651f5e656a1245de9cdb716926cccd Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 20:52:40 -0500 Subject: [PATCH 19/29] Add the option to ignore some of the pseudo instructions --HG-- extra : convert_revision : 2010782749ca9c5dd029f71480956b8a1fa96394 --- arch/alpha/pseudo_inst.cc | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index 1f24a07f58..d5d00bb180 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -26,16 +26,23 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include + #include "arch/alpha/pseudo_inst.hh" #include "cpu/exec_context.hh" +#include "sim/param.hh" #include "sim/serialize.hh" #include "sim/sim_exit.hh" #include "sim/sim_stats.hh" +using namespace std; using namespace Statistics; namespace AlphaPseudo { + bool doStatisticsInsts; + bool doCheckpointInsts; + void m5exit_old(ExecContext *xc) { @@ -53,6 +60,9 @@ namespace AlphaPseudo void resetstats(ExecContext *xc) { + if (!doStatisticsInsts) + return; + Tick delay = xc->regs.intRegFile[16]; Tick period = xc->regs.intRegFile[17]; @@ -65,6 +75,9 @@ namespace AlphaPseudo void dumpstats(ExecContext *xc) { + if (!doStatisticsInsts) + return; + Tick delay = xc->regs.intRegFile[16]; Tick period = xc->regs.intRegFile[17]; @@ -77,6 +90,9 @@ namespace AlphaPseudo void dumpresetstats(ExecContext *xc) { + if (!doStatisticsInsts) + return; + Tick delay = xc->regs.intRegFile[16]; Tick period = xc->regs.intRegFile[17]; @@ -89,6 +105,9 @@ namespace AlphaPseudo void m5checkpoint(ExecContext *xc) { + if (!doCheckpointInsts) + return; + Tick delay = xc->regs.intRegFile[16]; Tick period = xc->regs.intRegFile[17]; @@ -98,4 +117,22 @@ namespace AlphaPseudo SetupCheckpoint(when, repeat); } + class Context : public ParamContext + { + public: + Context(const string §ion) : ParamContext(section) {} + void checkParams(); + }; + + Context context("PseudoInsts"); + + Param __statistics(&context, "statistics", "yes"); + Param __checkpoint(&context, "checkpoint", "yes"); + + void + Context::checkParams() + { + doStatisticsInsts = __statistics; + doCheckpointInsts = __checkpoint; + } } From c307c22257ef143c8e1da562bbdfdc32f47bcf59 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 21:58:23 -0500 Subject: [PATCH 20/29] Fix a bug in the pseudo instruction context arch/alpha/pseudo_inst.cc: Don't forget the descriptions --HG-- extra : convert_revision : f208ea24d5b34283e962916cb4c7dff976406285 --- arch/alpha/pseudo_inst.cc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index d5d00bb180..50b7d1aafd 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -126,8 +126,12 @@ namespace AlphaPseudo Context context("PseudoInsts"); - Param __statistics(&context, "statistics", "yes"); - Param __checkpoint(&context, "checkpoint", "yes"); + Param __statistics(&context, "statistics", + "enable the statistics pseudo instructions", + yes); + Param __checkpoint(&context, "checkpoint", + "enable the checkpoint pseudo instructions", + yes); void Context::checkParams() From 491fb95919f05220c05bb77fb82376fb9bc7dc76 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 2 Nov 2003 22:12:20 -0500 Subject: [PATCH 21/29] ok, let's get this right arch/alpha/pseudo_inst.cc: yes is not a real value, use true --HG-- extra : convert_revision : 30b998ae6f13641d70c9158777a12b00df8742fe --- arch/alpha/pseudo_inst.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index 50b7d1aafd..f8e0036ba2 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -128,10 +128,10 @@ namespace AlphaPseudo Param __statistics(&context, "statistics", "enable the statistics pseudo instructions", - yes); + true); Param __checkpoint(&context, "checkpoint", "enable the checkpoint pseudo instructions", - yes); + true); void Context::checkParams() From 2ac054386d9394689e728241972dab7184ae965d Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Sun, 2 Nov 2003 21:49:15 -0800 Subject: [PATCH 22/29] Print a warning rather than failing if we're unserializing and there's an object in the config that was not in the checkpointed config. This code compiles, but I haven't tested it... I'm committing it so Ron can have it. Should not effect anything that currently works. base/inifile.cc: base/inifile.hh: Add sectionExists() method so you can query whether a section exists without knowing any of the entry names that would be in it. sim/serialize.cc: sim/serialize.hh: Add Checkpoint::sectionExists() (pass through to IniFile). --HG-- extra : convert_revision : 905db122afdfe55946ab8493ccac0b1e715bc7c6 --- base/inifile.cc | 8 ++++++++ base/inifile.hh | 7 +++++++ sim/serialize.cc | 7 +++++++ sim/serialize.hh | 2 ++ 4 files changed, 24 insertions(+) diff --git a/base/inifile.cc b/base/inifile.cc index 7e7485bcb1..2717a534de 100644 --- a/base/inifile.cc +++ b/base/inifile.cc @@ -402,6 +402,14 @@ IniFile::findAppend(const string &_section, const string &entry, return ret; } + +bool +IniFile::sectionExists(const string §ionName) const +{ + return findSection(sectionName) != NULL; +} + + bool IniFile::Section::printUnreferenced(const string §ionName) { diff --git a/base/inifile.hh b/base/inifile.hh index f67fdc7beb..f7229f2f2d 100644 --- a/base/inifile.hh +++ b/base/inifile.hh @@ -208,6 +208,13 @@ class IniFile bool findAppend(const std::string §ion, const std::string &entry, std::string &value) const; + /// Determine whether the named section exists in the .ini file. + /// Note that the 'Section' class is (intentionally) not public, + /// so all clients can do is get a bool that says whether there + /// are any values in that section or not. + /// @return True if the section exists. + bool sectionExists(const std::string §ion) const; + /// Print unreferenced entries in object. Iteratively calls /// printUnreferend() on all the constituent sections. bool printUnreferenced(); diff --git a/sim/serialize.cc b/sim/serialize.cc index bd528c678e..0eb26c31db 100644 --- a/sim/serialize.cc +++ b/sim/serialize.cc @@ -494,3 +494,10 @@ Checkpoint::findObj(const std::string §ion, const std::string &entry, return false; } + + +bool +Checkpoint::sectionExists(const std::string §ion) +{ + return db->sectionExists(section); +} diff --git a/sim/serialize.hh b/sim/serialize.hh index 78cbb702a7..09e91d8160 100644 --- a/sim/serialize.hh +++ b/sim/serialize.hh @@ -244,6 +244,8 @@ class Checkpoint bool findObj(const std::string §ion, const std::string &entry, Serializeable *&value); + + bool sectionExists(const std::string §ion); }; From 7eb9683cc1e59e7ab990971356611ff8f2bacfec Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 3 Nov 2003 11:03:13 -0500 Subject: [PATCH 23/29] Fix segfault from unserialization, add system_sample as a configuration --HG-- extra : convert_revision : 41604400cb4b334dcffded44b77fa63658d8b096 From 2d265afed21bc51d91afd54a75dbd4071cc1807e Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 3 Nov 2003 12:17:55 -0500 Subject: [PATCH 24/29] Fix unserialize so that it still gos through the entire tree, but warns if it doesn't find a section. Used to stop if a section didn't exist, but it's children might still exist. --HG-- extra : convert_revision : d3f511b69bec26a80cb004d83c385df3de13f004 From c23eb836d558dfdf5f4d9c4ec85fe2ad7728defe Mon Sep 17 00:00:00 2001 From: Andrew Schultz Date: Mon, 3 Nov 2003 14:33:02 -0500 Subject: [PATCH 25/29] Added serialization for DmaPhys structs and serialize DmaRequest::phys --HG-- extra : convert_revision : 04f36fc5e6636c08ccb04d244a44017c7d0969ac From ad8c0da4a40536440c9fda215ce3169334ab09e2 Mon Sep 17 00:00:00 2001 From: Andrew Schultz Date: Mon, 3 Nov 2003 16:29:32 -0500 Subject: [PATCH 26/29] Fix etherdev so it serializes txPacket and rxPacket and fixes up the DmaRequest correctly and remove previous serialization of DmaPhys --HG-- extra : convert_revision : 65e919ceb573a7554c07947951a74ae321f0f4c0 From ea233ee2aac3b74a817ae3c20305798d420dcaa2 Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 3 Nov 2003 16:43:59 -0500 Subject: [PATCH 27/29] Fix sampling cpu switchover of suspended contexts, and make some changes to sampling config files to allow for different periods of the server and client systems. --HG-- extra : convert_revision : ac4b6679266884d9bc3c20abb2a817f69873cc39 From c55e6b495e569e2b908ab4f58c3ecb529c64f288 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 3 Nov 2003 16:47:08 -0500 Subject: [PATCH 28/29] Make it so the quiesce instruction is conditionally enabled arch/alpha/isa_desc: move the quiesce instruction out of here so I can conditionally enable it. arch/alpha/pseudo_inst.cc: conditionally enable quiesce arch/alpha/pseudo_inst.hh: add quiesce --HG-- extra : convert_revision : e1c474c4bf8761ff58073785d82b2bec9f632885 --- arch/alpha/isa_desc | 7 ++----- arch/alpha/pseudo_inst.cc | 21 +++++++++++++++++++-- arch/alpha/pseudo_inst.hh | 1 + 3 files changed, 22 insertions(+), 7 deletions(-) diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index ec9fd183a8..4364bae34a 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -2410,11 +2410,8 @@ decode OPCODE default Unknown::unknown() { } }}); 0x01: quiesce({{ - if (!xc->misspeculating()) { - Annotate::QUIESCE(xc); - xc->setStatus(ExecContext::Suspended); - xc->kernelStats.quiesce(); - } + if (!xc->misspeculating()) + AlphaPseudo::quiesce(xc); }}); 0x10: ivlb({{ if (!xc->misspeculating()) { diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index f8e0036ba2..c62de3ce6a 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -30,6 +30,7 @@ #include "arch/alpha/pseudo_inst.hh" #include "cpu/exec_context.hh" +#include "sim/annotation.hh" #include "sim/param.hh" #include "sim/serialize.hh" #include "sim/sim_exit.hh" @@ -42,6 +43,18 @@ namespace AlphaPseudo { bool doStatisticsInsts; bool doCheckpointInsts; + bool doQuiesce; + + void + quiesce(ExecContext *xc) + { + if (!doQuiesce) + return; + + Annotate::QUIESCE(xc); + xc->setStatus(ExecContext::Suspended); + xc->kernelStats.quiesce(); + } void m5exit_old(ExecContext *xc) @@ -126,16 +139,20 @@ namespace AlphaPseudo Context context("PseudoInsts"); + Param __quiesce(&context, "quiesce", + "enable quiesce instructions", + true); Param __statistics(&context, "statistics", - "enable the statistics pseudo instructions", + "enable statistics pseudo instructions", true); Param __checkpoint(&context, "checkpoint", - "enable the checkpoint pseudo instructions", + "enable checkpoint pseudo instructions", true); void Context::checkParams() { + doQuiesce = __quiesce; doStatisticsInsts = __statistics; doCheckpointInsts = __checkpoint; } diff --git a/arch/alpha/pseudo_inst.hh b/arch/alpha/pseudo_inst.hh index b212a392cf..60031f8cd3 100644 --- a/arch/alpha/pseudo_inst.hh +++ b/arch/alpha/pseudo_inst.hh @@ -30,6 +30,7 @@ class ExecContext; namespace AlphaPseudo { + void quiesce(ExecContext *xc); void m5exit(ExecContext *xc); void m5exit_old(ExecContext *xc); void resetstats(ExecContext *xc); From 29474bdf027fe3396e0be2f6acbe2a6b89136bc2 Mon Sep 17 00:00:00 2001 From: Andrew Schultz Date: Mon, 3 Nov 2003 18:40:09 -0500 Subject: [PATCH 29/29] Fix unserialize issues with etherdev (used to leave junk as callbacks which would segfault) --HG-- extra : convert_revision : 3b99b507c2df576622b9304215010bbfecedf8f1