From e42d2a47895a6856f0159dc01612e406ec3b676f Mon Sep 17 00:00:00 2001 From: "Daniel R. Carvalho" Date: Fri, 7 May 2021 14:07:39 -0300 Subject: [PATCH] arch,sim: Rename PseudoInst namespace as pseudo_inst As part of recent decisions regarding namespace naming conventions, all namespaces will be changed to snake case. ::PseudoInst became ::pseudo_inst. Change-Id: Ie5a8f82a532e5158992ca260b4a24e7c6f311be9 Signed-off-by: Daniel R. Carvalho Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45429 Tested-by: kokoro Reviewed-by: Hoa Nguyen Maintainer: Gabe Black --- src/arch/arm/isa/insts/m5ops.isa | 2 +- src/arch/arm/semihosting.cc | 8 +-- src/arch/arm/tlb.cc | 6 +- src/arch/riscv/isa/formats/m5ops.isa | 2 +- src/arch/sparc/isa/decoder.isa | 2 +- src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 +- src/arch/x86/tlb.cc | 4 +- src/sim/pseudo_inst.cc | 62 ++++++++++--------- src/sim/pseudo_inst.hh | 8 ++- 9 files changed, 50 insertions(+), 46 deletions(-) diff --git a/src/arch/arm/isa/insts/m5ops.isa b/src/arch/arm/isa/insts/m5ops.isa index fafb44b6e4..4e508f0186 100644 --- a/src/arch/arm/isa/insts/m5ops.isa +++ b/src/arch/arm/isa/insts/m5ops.isa @@ -40,7 +40,7 @@ let {{ uint64_t ret; int func = bits(machInst, 23, 16); auto *tc = xc->tcBase(); - if (!PseudoInst::pseudoInst<%s>(tc, func, ret)) + if (!pseudo_inst::pseudoInst<%s>(tc, func, ret)) fault = std::make_shared(machInst, true); ''' gem5OpIop = ArmInstObjParams("gem5op", "Gem5Op64", "PredOp", diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc index 6a52e07ecb..88a604e7f5 100644 --- a/src/arch/arm/semihosting.cc +++ b/src/arch/arm/semihosting.cc @@ -722,10 +722,10 @@ ArmSemihosting::RetErrno ArmSemihosting::callGem5PseudoOp32(ThreadContext *tc, uint32_t encoded_func) { uint8_t func; - PseudoInst::decodeAddrOffset(encoded_func, func); + pseudo_inst::decodeAddrOffset(encoded_func, func); uint64_t ret; - if (PseudoInst::pseudoInst(tc, func, ret)) + if (pseudo_inst::pseudoInst(tc, func, ret)) return retOK(ret); else return retError(EINVAL); @@ -735,10 +735,10 @@ ArmSemihosting::RetErrno ArmSemihosting::callGem5PseudoOp64(ThreadContext *tc, uint64_t encoded_func) { uint8_t func; - PseudoInst::decodeAddrOffset(encoded_func, func); + pseudo_inst::decodeAddrOffset(encoded_func, func); uint64_t ret; - if (PseudoInst::pseudoInst(tc, func, ret)) + if (pseudo_inst::pseudoInst(tc, func, ret)) return retOK(ret); else return retError(EINVAL); diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index b1333e696a..df83395a41 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -142,15 +142,15 @@ TLB::finalizePhysical(const RequestPtr &req, if (m5opRange.contains(paddr)) { uint8_t func; - PseudoInst::decodeAddrOffset(paddr - m5opRange.start(), func); + pseudo_inst::decodeAddrOffset(paddr - m5opRange.start(), func); req->setLocalAccessor( [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles { uint64_t ret; if (inAArch64(tc)) - PseudoInst::pseudoInst(tc, func, ret); + pseudo_inst::pseudoInst(tc, func, ret); else - PseudoInst::pseudoInst(tc, func, ret); + pseudo_inst::pseudoInst(tc, func, ret); if (mode == Read) pkt->setLE(ret); diff --git a/src/arch/riscv/isa/formats/m5ops.isa b/src/arch/riscv/isa/formats/m5ops.isa index 986438b0ef..edc965a7f7 100644 --- a/src/arch/riscv/isa/formats/m5ops.isa +++ b/src/arch/riscv/isa/formats/m5ops.isa @@ -38,7 +38,7 @@ def format M5Op() {{ iop = InstObjParams(name, Name, 'PseudoOp', ''' uint64_t result; - PseudoInst::pseudoInst(xc->tcBase(), M5FUNC, result); + pseudo_inst::pseudoInst(xc->tcBase(), M5FUNC, result); a0 = result''', ['IsNonSpeculative', 'IsSerializeAfter']) header_output = BasicDeclare.subst(iop) diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 1917207692..9c85cdf9b1 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -1002,7 +1002,7 @@ decode OP default Unknown::unknown() } // M5 special opcodes use the reserved IMPDEP2A opcode space 0x37: BasicOperate::pseudo_inst({{ - if (!PseudoInst::pseudoInst( + if (!pseudo_inst::pseudoInst( xc->tcBase(), M5FUNC)) { fault = std::make_shared(); } diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index fe8a2bcdd7..48f46d425f 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -145,7 +145,7 @@ // instructions. //0x04: loadall_or_reset_or_hang(); 0x4: BasicOperate::gem5Op({{ - bool recognized = PseudoInst::pseudoInst( + bool recognized = pseudo_inst::pseudoInst( xc->tcBase(), IMMEDIATE); if (!recognized) fault = std::make_shared(); diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index a76c7ee8d1..b44353a547 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -263,12 +263,12 @@ TLB::finalizePhysical(const RequestPtr &req, if (m5opRange.contains(paddr)) { req->setFlags(Request::STRICT_ORDER); uint8_t func; - PseudoInst::decodeAddrOffset(paddr - m5opRange.start(), func); + pseudo_inst::decodeAddrOffset(paddr - m5opRange.start(), func); req->setLocalAccessor( [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles { uint64_t ret; - PseudoInst::pseudoInst(tc, func, ret); + pseudo_inst::pseudoInst(tc, func, ret); if (mode == Read) pkt->setLE(ret); return Cycles(1); diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index 131e914869..a40c956783 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -71,7 +71,8 @@ using namespace Stats; -namespace PseudoInst +GEM5_DEPRECATED_NAMESPACE(PseudoInst, pseudo_inst); +namespace pseudo_inst { /** @@ -101,7 +102,7 @@ const std::string DIST_SIZE = "dist-size"; void arm(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::arm()\n"); + DPRINTF(PseudoInst, "pseudo_inst::arm()\n"); auto *workload = tc->getSystemPtr()->workload; if (workload) @@ -111,35 +112,35 @@ arm(ThreadContext *tc) void quiesce(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::quiesce()\n"); + DPRINTF(PseudoInst, "pseudo_inst::quiesce()\n"); tc->quiesce(); } void quiesceSkip(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n"); + DPRINTF(PseudoInst, "pseudo_inst::quiesceSkip()\n"); tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1); } void quiesceNs(ThreadContext *tc, uint64_t ns) { - DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns); + DPRINTF(PseudoInst, "pseudo_inst::quiesceNs(%i)\n", ns); tc->quiesceTick(curTick() + sim_clock::Int::ns * ns); } void quiesceCycles(ThreadContext *tc, uint64_t cycles) { - DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles); + DPRINTF(PseudoInst, "pseudo_inst::quiesceCycles(%i)\n", cycles); tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles))); } uint64_t quiesceTime(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n"); + DPRINTF(PseudoInst, "pseudo_inst::quiesceTime()\n"); return (tc->readLastActivate() - tc->readLastSuspend()) / sim_clock::Int::ns; @@ -148,18 +149,18 @@ quiesceTime(ThreadContext *tc) uint64_t rpns(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::rpns()\n"); + DPRINTF(PseudoInst, "pseudo_inst::rpns()\n"); return curTick() / sim_clock::Int::ns; } void wakeCPU(ThreadContext *tc, uint64_t cpuid) { - DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid); + DPRINTF(PseudoInst, "pseudo_inst::wakeCPU(%i)\n", cpuid); System *sys = tc->getSystemPtr(); if (sys->threads.size() <= cpuid) { - warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts" + warn("pseudo_inst::wakeCPU(%i), cpuid greater than number of contexts" "(%i)\n", cpuid, sys->threads.size()); return; } @@ -172,7 +173,7 @@ wakeCPU(ThreadContext *tc, uint64_t cpuid) void m5exit(ThreadContext *tc, Tick delay) { - DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay); + DPRINTF(PseudoInst, "pseudo_inst::m5exit(%i)\n", delay); if (DistIface::readyToExit(delay)) { Tick when = curTick() + delay * sim_clock::Int::ns; exitSimLoop("m5_exit instruction encountered", 0, when, 0, true); @@ -184,7 +185,7 @@ uint64_t m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e, uint64_t f) { - DPRINTF(PseudoInst, "PseudoInst::m5sum(%#x, %#x, %#x, %#x, %#x, %#x)\n", + DPRINTF(PseudoInst, "pseudo_inst::m5sum(%#x, %#x, %#x, %#x, %#x, %#x)\n", a, b, c, d, e, f); return a + b + c + d + e + f; } @@ -192,7 +193,7 @@ m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, void m5fail(ThreadContext *tc, Tick delay, uint64_t code) { - DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code); + DPRINTF(PseudoInst, "pseudo_inst::m5fail(%i, %i)\n", delay, code); Tick when = curTick() + delay * sim_clock::Int::ns; exitSimLoop("m5_fail instruction encountered", code, when, 0, true); } @@ -200,7 +201,7 @@ m5fail(ThreadContext *tc, Tick delay, uint64_t code) void loadsymbol(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n"); + DPRINTF(PseudoInst, "pseudo_inst::loadsymbol()\n"); const std::string &filename = tc->getCpuPtr()->system->params().symbolfile; if (filename.empty()) { @@ -252,7 +253,7 @@ loadsymbol(ThreadContext *tc) void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) { - DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n", + DPRINTF(PseudoInst, "pseudo_inst::addsymbol(0x%x, 0x%x)\n", addr, symbolAddr); std::string symbol; @@ -269,8 +270,8 @@ addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) uint64_t initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2) { - DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1, - (char *)&key_str2); + DPRINTF(PseudoInst, "pseudo_inst::initParam() key:%s%s\n", + (char *)&key_str1, (char *)&key_str2); // The key parameter string is passed in via two 64-bit registers. We copy // out the characters from the 64-bit integer variables here, and @@ -299,7 +300,7 @@ initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2) void resetstats(ThreadContext *tc, Tick delay, Tick period) { - DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period); + DPRINTF(PseudoInst, "pseudo_inst::resetstats(%i, %i)\n", delay, period); if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -313,7 +314,7 @@ resetstats(ThreadContext *tc, Tick delay, Tick period) void dumpstats(ThreadContext *tc, Tick delay, Tick period) { - DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period); + DPRINTF(PseudoInst, "pseudo_inst::dumpstats(%i, %i)\n", delay, period); if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -327,7 +328,8 @@ dumpstats(ThreadContext *tc, Tick delay, Tick period) void dumpresetstats(ThreadContext *tc, Tick delay, Tick period) { - DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period); + DPRINTF(PseudoInst, "pseudo_inst::dumpresetstats(%i, %i)\n", delay, + period); if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -341,7 +343,7 @@ dumpresetstats(ThreadContext *tc, Tick delay, Tick period) void m5checkpoint(ThreadContext *tc, Tick delay, Tick period) { - DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period); + DPRINTF(PseudoInst, "pseudo_inst::m5checkpoint(%i, %i)\n", delay, period); if (!tc->getCpuPtr()->params().do_checkpoint_insts) return; @@ -355,7 +357,7 @@ m5checkpoint(ThreadContext *tc, Tick delay, Tick period) uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) { - DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n", + DPRINTF(PseudoInst, "pseudo_inst::readfile(0x%x, 0x%x, 0x%x)\n", vaddr, len, offset); const std::string &file = tc->getSystemPtr()->params().readfile; @@ -394,7 +396,7 @@ uint64_t writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, Addr filename_addr) { - DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n", + DPRINTF(PseudoInst, "pseudo_inst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n", vaddr, len, offset, filename_addr); // copy out target filename @@ -439,28 +441,28 @@ writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, void debugbreak(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n"); + DPRINTF(PseudoInst, "pseudo_inst::debugbreak()\n"); Debug::breakpoint(); } void switchcpu(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n"); + DPRINTF(PseudoInst, "pseudo_inst::switchcpu()\n"); exitSimLoop("switchcpu"); } void togglesync(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::togglesync()\n"); + DPRINTF(PseudoInst, "pseudo_inst::togglesync()\n"); DistIface::toggleSync(tc); } void triggerWorkloadEvent(ThreadContext *tc) { - DPRINTF(PseudoInst, "PseudoInst::triggerWorkloadEvent()\n"); + DPRINTF(PseudoInst, "pseudo_inst::triggerWorkloadEvent()\n"); tc->getSystemPtr()->workload->event(tc); } @@ -472,7 +474,7 @@ triggerWorkloadEvent(ThreadContext *tc) void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) { - DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid); + DPRINTF(PseudoInst, "pseudo_inst::workbegin(%i, %i)\n", workid, threadid); System *sys = tc->getSystemPtr(); const System::Params ¶ms = sys->params(); @@ -535,7 +537,7 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) { - DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid); + DPRINTF(PseudoInst, "pseudo_inst::workend(%i, %i)\n", workid, threadid); System *sys = tc->getSystemPtr(); const System::Params ¶ms = sys->params(); @@ -584,4 +586,4 @@ workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) } } -} // namespace PseudoInst +} // namespace pseudo_inst diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index b0b65c687d..de8a709960 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -46,6 +46,7 @@ class ThreadContext; #include "base/bitfield.hh" +#include "base/compiler.hh" #include "base/logging.hh" #include "base/trace.hh" #include "base/types.hh" // For Tick and Addr data types. @@ -53,7 +54,8 @@ class ThreadContext; #include "debug/PseudoInst.hh" #include "sim/guest_abi.hh" -namespace PseudoInst +GEM5_DEPRECATED_NAMESPACE(PseudoInst, pseudo_inst); +namespace pseudo_inst { static inline void @@ -110,7 +112,7 @@ template bool pseudoInstWork(ThreadContext *tc, uint8_t func, uint64_t &result) { - DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func); + DPRINTF(PseudoInst, "pseudo_inst::pseudoInst(%i)\n", func); result = 0; @@ -249,6 +251,6 @@ pseudoInst(ThreadContext *tc, uint8_t func) return pseudoInstWork(tc, func, result); } -} // namespace PseudoInst +} // namespace pseudo_inst #endif // __SIM_PSEUDO_INST_HH__