derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

configs, dev, learning-gem5, python, tests: more clarification

Browse Source 
This commit contains the rest of the base 2 vs base 10 cache/memory
size clarifications. It also changes the warning message to use
warn(). With these changes, the warning message should now no
longer show up during a fresh compilation of gem5.

Change-Id: Ia63f841bdf045b76473437f41548fab27dc19631
This commit is contained in:
Erin Le
2024-08-24 01:01:04 +00:00
committed by Erin (Jianghua) Le
parent 28453a0e3e
commit e1db67c4bd
87 changed files with 255 additions and 249 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
configs/example/gem5_library/multisim/multisim-fs-x86-npb.py
View File

@@ -101,15 +101,15 @@ multisim.set_num_processes(3)
for benchmark in obtain_resource("npb-benchmark-suite"):
for num_cores in [1, 2]:
cache_hierarchy = MESITwoLevelCacheHierarchy(
l1d_size="32kB",
l1i_size="32kB",
l2_size="256kB",
l1d_size="32KiB",
l1i_size="32KiB",
l2_size="256KiB",
l1d_assoc=8,
l1i_assoc=8,
l2_assoc=16,
num_l2_banks=2,
)
memory = DualChannelDDR4_2400(size="3GB")
memory = DualChannelDDR4_2400(size="3GiB")
processor = SimpleSwitchableProcessor(
starting_core_type=CPUTypes.ATOMIC,
switch_core_type=CPUTypes.TIMING,

2
configs/example/gem5_library/multisim/multisim-print-this.py
View File

@@ -70,7 +70,7 @@ multisim.set_num_processes(2)
for process_id in range(5):
cache_hierarchy = NoCache()
memory = SingleChannelDDR3_1600(size="32MB")
memory = SingleChannelDDR3_1600(size="32MiB")
processor = SimpleProcessor(
cpu_type=CPUTypes.TIMING, isa=ISA.X86, num_cores=1
)