configs, dev, learning-gem5, python, tests: more clarification

This commit contains the rest of the base 2 vs base 10 cache/memory
size clarifications. It also changes the warning message to use
warn(). With these changes, the warning message should now no
longer show up during a fresh compilation of gem5.

Change-Id: Ia63f841bdf045b76473437f41548fab27dc19631

configs/example/gem5_library/checkpoints/riscv-hello-restore-checkpoint.py

@@ -64,14 +64,14 @@ requires(isa_required=ISA.RISCV)
 cache_hierarchy = NoCache()
 
 # We use a single channel DDR3_1600 memory system
-memory = SingleChannelDDR3_1600(size="32MB")
+memory = SingleChannelDDR3_1600(size="32MiB")
 
 # We use a simple Timing processor with one core.
 processor = SimpleProcessor(
     cpu_type=CPUTypes.TIMING, isa=ISA.RISCV, num_cores=1
 )
 
-# The gem5 library simble board which can be used to run simple SE-mode
+# The gem5 library simple board which can be used to run simple SE-mode
 # simulations.
 board = SimpleBoard(
     clk_freq="3GHz",

configs/example/gem5_library/checkpoints/riscv-hello-save-checkpoint.py

@@ -75,14 +75,14 @@ requires(isa_required=ISA.RISCV)
 cache_hierarchy = NoCache()
 
 # We use a single channel DDR3_1600 memory system
-memory = SingleChannelDDR3_1600(size="32MB")
+memory = SingleChannelDDR3_1600(size="32MiB")
 
 # We use a simple Timing processor with one core.
 processor = SimpleProcessor(
     cpu_type=CPUTypes.TIMING, isa=ISA.RISCV, num_cores=1
 )
 
-# The gem5 library simble board which can be used to run simple SE-mode
+# The gem5 library simple board which can be used to run simple SE-mode
 # simulations.
 board = SimpleBoard(
     clk_freq="3GHz",

configs/example/gem5_library/checkpoints/simpoints-se-checkpoint.py

@@ -94,7 +94,7 @@ cache_hierarchy = NoCache()
 # Using simple memory to take checkpoints might slightly imporve the
 # performance in atomic mode. The memory structure can be changed when
 # restoring from a checkpoint, but the size of the memory must be maintained.
-memory = SingleChannelDDR3_1600(size="2GB")
+memory = SingleChannelDDR3_1600(size="2GiB")
 
 processor = SimpleProcessor(
     cpu_type=CPUTypes.ATOMIC,

configs/example/gem5_library/checkpoints/simpoints-se-restore.py

@@ -81,14 +81,14 @@ requires(isa_required=ISA.X86)
 # The cache hierarchy can be different from the cache hierarchy used in taking
 # the checkpoints
 cache_hierarchy = PrivateL1PrivateL2WalkCacheHierarchy(
-    l1d_size="32kB",
-    l1i_size="32kB",
-    l2_size="256kB",
+    l1d_size="32KiB",
+    l1i_size="32KiB",
+    l2_size="256KiB",
 )
 
 # The memory structure can be different from the memory structure used in
 # taking the checkpoints, but the size of the memory must be maintained
-memory = DualChannelDDR4_2400(size="2GB")
+memory = DualChannelDDR4_2400(size="2GiB")
 
 processor = SimpleProcessor(
     cpu_type=CPUTypes.TIMING,