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configs, dev, learning-gem5, python, tests: more clarification

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This commit contains the rest of the base 2 vs base 10 cache/memory
size clarifications. It also changes the warning message to use
warn(). With these changes, the warning message should now no
longer show up during a fresh compilation of gem5.

Change-Id: Ia63f841bdf045b76473437f41548fab27dc19631
This commit is contained in:
Erin Le
2024-08-24 01:01:04 +00:00
committed by Erin (Jianghua) Le
parent 28453a0e3e
commit e1db67c4bd
87 changed files with 255 additions and 249 deletions
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66
configs/common/Benchmarks.py
View File

@@ -55,7 +55,7 @@ class SysConfig:
if self.memsize:
return self.memsize
else:
return "128MB"
return "128MiB"
def disks(self):
if self.disknames:
@@ -77,8 +77,8 @@ class SysConfig:
# The first defined machine is the test system, the others are driving systems
Benchmarks = {
"PovrayBench": [SysConfig("povray-bench.rcS", "512MB", ["povray.img"])],
"PovrayAutumn": [SysConfig("povray-autumn.rcS", "512MB", ["povray.img"])],
"PovrayBench": [SysConfig("povray-bench.rcS", "512MiB", ["povray.img"])],
"PovrayAutumn": [SysConfig("povray-autumn.rcS", "512MiB", ["povray.img"])],
"NetperfStream": [
SysConfig("netperf-stream-client.rcS"),
SysConfig("netperf-server.rcS"),
@@ -97,55 +97,55 @@ Benchmarks = {
SysConfig("netperf-server.rcS"),
],
"SurgeStandard": [
SysConfig("surge-server.rcS", "512MB"),
SysConfig("surge-client.rcS", "256MB"),
SysConfig("surge-server.rcS", "512MiB"),
SysConfig("surge-client.rcS", "256MiB"),
],
"SurgeSpecweb": [
SysConfig("spec-surge-server.rcS", "512MB"),
SysConfig("spec-surge-client.rcS", "256MB"),
SysConfig("spec-surge-server.rcS", "512MiB"),
SysConfig("spec-surge-client.rcS", "256MiB"),
],
"Nhfsstone": [
SysConfig("nfs-server-nhfsstone.rcS", "512MB"),
SysConfig("nfs-server-nhfsstone.rcS", "512MiB"),
SysConfig("nfs-client-nhfsstone.rcS"),
],
"Nfs": [
SysConfig("nfs-server.rcS", "900MB"),
SysConfig("nfs-server.rcS", "900MiB"),
SysConfig("nfs-client-dbench.rcS"),
],
"NfsTcp": [
SysConfig("nfs-server.rcS", "900MB"),
SysConfig("nfs-server.rcS", "900MiB"),
SysConfig("nfs-client-tcp.rcS"),
],
"IScsiInitiator": [
SysConfig("iscsi-client.rcS", "512MB"),
SysConfig("iscsi-server.rcS", "512MB"),
SysConfig("iscsi-client.rcS", "512MiB"),
SysConfig("iscsi-server.rcS", "512MiB"),
],
"IScsiTarget": [
SysConfig("iscsi-server.rcS", "512MB"),
SysConfig("iscsi-client.rcS", "512MB"),
SysConfig("iscsi-server.rcS", "512MiB"),
SysConfig("iscsi-client.rcS", "512MiB"),
],
"Validation": [
SysConfig("iscsi-server.rcS", "512MB"),
SysConfig("iscsi-client.rcS", "512MB"),
SysConfig("iscsi-server.rcS", "512MiB"),
SysConfig("iscsi-client.rcS", "512MiB"),
],
"Ping": [SysConfig("ping-server.rcS"), SysConfig("ping-client.rcS")],
"ValAccDelay": [SysConfig("devtime.rcS", "512MB")],
"ValAccDelay2": [SysConfig("devtimewmr.rcS", "512MB")],
"ValMemLat": [SysConfig("micro_memlat.rcS", "512MB")],
"ValMemLat2MB": [SysConfig("micro_memlat2mb.rcS", "512MB")],
"ValMemLat8MB": [SysConfig("micro_memlat8mb.rcS", "512MB")],
"ValMemLat": [SysConfig("micro_memlat8.rcS", "512MB")],
"ValTlbLat": [SysConfig("micro_tlblat.rcS", "512MB")],
"ValSysLat": [SysConfig("micro_syscall.rcS", "512MB")],
"ValCtxLat": [SysConfig("micro_ctx.rcS", "512MB")],
"ValStream": [SysConfig("micro_stream.rcS", "512MB")],
"ValStreamScale": [SysConfig("micro_streamscale.rcS", "512MB")],
"ValStreamCopy": [SysConfig("micro_streamcopy.rcS", "512MB")],
"MutexTest": [SysConfig("mutex-test.rcS", "128MB")],
"ValAccDelay": [SysConfig("devtime.rcS", "512MiB")],
"ValAccDelay2": [SysConfig("devtimewmr.rcS", "512MiB")],
"ValMemLat": [SysConfig("micro_memlat.rcS", "512MiB")],
"ValMemLat2MB": [SysConfig("micro_memlat2mb.rcS", "512MiB")],
"ValMemLat8MB": [SysConfig("micro_memlat8mb.rcS", "512MiB")],
"ValMemLat": [SysConfig("micro_memlat8.rcS", "512MiB")],
"ValTlbLat": [SysConfig("micro_tlblat.rcS", "512MiB")],
"ValSysLat": [SysConfig("micro_syscall.rcS", "512MiB")],
"ValCtxLat": [SysConfig("micro_ctx.rcS", "512MiB")],
"ValStream": [SysConfig("micro_stream.rcS", "512MiB")],
"ValStreamScale": [SysConfig("micro_streamscale.rcS", "512MiB")],
"ValStreamCopy": [SysConfig("micro_streamcopy.rcS", "512MiB")],
"MutexTest": [SysConfig("mutex-test.rcS", "128MiB")],
"ArmAndroid-GB": [
SysConfig(
"null.rcS",
"256MB",
"256MiB",
["ARMv7a-Gingerbread-Android.SMP.mouse.nolock.clean.img"],
None,
"android-gingerbread",
@@ -154,7 +154,7 @@ Benchmarks = {
"bbench-gb": [
SysConfig(
"bbench-gb.rcS",
"256MB",
"256MiB",
["ARMv7a-Gingerbread-Android.SMP.mouse.nolock.img"],
None,
"android-gingerbread",
@@ -163,7 +163,7 @@ Benchmarks = {
"ArmAndroid-ICS": [
SysConfig(
"null.rcS",
"256MB",
"256MiB",
["ARMv7a-ICS-Android.SMP.nolock.clean.img"],
None,
"android-ics",
@@ -172,7 +172,7 @@ Benchmarks = {
"bbench-ics": [
SysConfig(
"bbench-ics.rcS",
"256MB",
"256MiB",
["ARMv7a-ICS-Android.SMP.nolock.img"],
None,
"android-ics",

42
configs/common/FSConfig.py
View File

@@ -137,8 +137,8 @@ def makeSparcSystem(mem_mode, mdesc=None, cmdline=None):
self.t1000.attachOnChipIO(self.membus)
self.t1000.attachIO(self.iobus)
self.mem_ranges = [
AddrRange(Addr("1MB"), size="64MB"),
AddrRange(Addr("2GB"), size="256MB"),
AddrRange(Addr("1MiB"), size="64MiB"),
AddrRange(Addr("2GiB"), size="256MiB"),
]
self.bridge.mem_side_port = self.iobus.cpu_side_ports
self.bridge.cpu_side_port = self.membus.mem_side_ports
@@ -174,21 +174,21 @@ def makeSparcSystem(mem_mode, mdesc=None, cmdline=None):
# ROM for OBP/Reset/Hypervisor
self.rom = SimpleMemory(
image_file=binary("t1000_rom.bin"),
range=AddrRange(0xFFF0000000, size="8MB"),
range=AddrRange(0xFFF0000000, size="8MiB"),
)
# nvram
self.nvram = SimpleMemory(
image_file=binary("nvram1"), range=AddrRange(0x1F11000000, size="8kB")
image_file=binary("nvram1"), range=AddrRange(0x1F11000000, size="8KiB")
)
# hypervisor description
self.hypervisor_desc = SimpleMemory(
image_file=binary("1up-hv.bin"),
range=AddrRange(0x1F12080000, size="8kB"),
range=AddrRange(0x1F12080000, size="8KiB"),
)
# partition description
self.partition_desc = SimpleMemory(
image_file=binary("1up-md.bin"),
range=AddrRange(0x1F12000000, size="8kB"),
range=AddrRange(0x1F12000000, size="8KiB"),
)
self.rom.port = self.membus.mem_side_ports
@@ -423,7 +423,7 @@ def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None):
self.iobus = IOXBar()
self.membus = MemBus()
self.bridge = Bridge(delay="50ns")
self.mem_ranges = [AddrRange("1GB")]
self.mem_ranges = [AddrRange("1GiB")]
self.bridge.mem_side_port = self.iobus.cpu_side_ports
self.bridge.cpu_side_port = self.membus.mem_side_ports
self.disks = makeCowDisks(mdesc.disks())
@@ -469,7 +469,7 @@ def connectX86ClassicSystem(x86_sys, numCPUs):
x86_sys.bridge.cpu_side_port = x86_sys.membus.mem_side_ports
# Allow the bridge to pass through:
# 1) kernel configured PCI device memory map address: address range
# [0xC0000000, 0xFFFF0000). (The upper 64kB are reserved for m5ops.)
# [0xC0000000, 0xFFFF0000). (The upper 64KiB are reserved for m5ops.)
# 2) the bridge to pass through the IO APIC (two pages, already contained in 1),
# 3) everything in the IO address range up to the local APIC, and
# 4) then the entire PCI address space and beyond.
@@ -526,22 +526,22 @@ def makeX86System(mem_mode, numCPUs=1, mdesc=None, workload=None, Ruby=False):
# Physical memory
# On the PC platform, the memory region 0xC0000000-0xFFFFFFFF is reserved
# for various devices. Hence, if the physical memory size is greater than
# 3GB, we need to split it into two parts.
# 3GiB, we need to split it into two parts.
excess_mem_size = convert.toMemorySize(mdesc.mem()) - convert.toMemorySize(
"3GB"
"3GiB"
)
if excess_mem_size <= 0:
self.mem_ranges = [AddrRange(mdesc.mem())]
else:
warn(
"Physical memory size specified is %s which is greater than "
"3GB. Twice the number of memory controllers would be "
"3GiB. Twice the number of memory controllers would be "
"created." % (mdesc.mem())
)
self.mem_ranges = [
AddrRange("3GB"),
AddrRange(Addr("4GB"), size=excess_mem_size),
AddrRange("3GiB"),
AddrRange(Addr("4GiB"), size=excess_mem_size),
]
# Platform
@@ -663,16 +663,16 @@ def makeLinuxX86System(
# Build up the x86 system and then specialize it for Linux
self = makeX86System(mem_mode, numCPUs, mdesc, X86FsLinux(), Ruby)
# We assume below that there's at least 1MB of memory. We'll require 2
# We assume below that there's at least 1MiB of memory. We'll require 2
# just to avoid corner cases.
phys_mem_size = sum([r.size() for r in self.mem_ranges])
assert phys_mem_size >= 0x200000
assert len(self.mem_ranges) <= 2
entries = [
# Mark the first megabyte of memory as reserved
X86E820Entry(addr=0, size="639kB", range_type=1),
X86E820Entry(addr=0x9FC00, size="385kB", range_type=2),
# Mark the first mibibyte of memory as reserved
X86E820Entry(addr=0, size="639KiB", range_type=1),
X86E820Entry(addr=0x9FC00, size="385KiB", range_type=2),
# Mark the rest of physical memory as available
X86E820Entry(
addr=0x100000,
@@ -681,7 +681,7 @@ def makeLinuxX86System(
),
]
# Mark [mem_size, 3GB) as reserved if memory less than 3GB, which force
# Mark [mem_size, 3iB) as reserved if memory less than 3GiB, which force
# IO devices to be mapped to [0xC0000000, 0xFFFF0000). Requests to this
# specific range can pass though bridge to iobus.
if len(self.mem_ranges) == 1:
@@ -693,10 +693,10 @@ def makeLinuxX86System(
)
)
# Reserve the last 16kB of the 32-bit address space for the m5op interface
entries.append(X86E820Entry(addr=0xFFFF0000, size="64kB", range_type=2))
# Reserve the last 16KiB of the 32-bit address space for the m5op interface
entries.append(X86E820Entry(addr=0xFFFF0000, size="64KiB", range_type=2))
# In case the physical memory is greater than 3GB, we split it into two
# In case the physical memory is greater than 3GiB, we split it into two
# parts and add a separate e820 entry for the second part. This entry
# starts at 0x100000000, which is the first address after the space
# reserved for devices.

2
configs/common/FileSystemConfig.py
View File

@@ -202,7 +202,7 @@ def register_node(cpu_list, mem, node_number):
file_append((nodedir, "cpumap"), hex_mask(cpu_list))
file_append(
(nodedir, "meminfo"),
"Node %d MemTotal: %dkB"
"Node %d MemTotal: %dKiB"
% (node_number, toMemorySize(str(mem)) / kibi),
)

8
configs/common/HMC.py
View File

@@ -300,10 +300,10 @@ def add_options(parser):
# address range for each of the serial links
parser.add_argument(
"--serial-link-addr-range",
default="1GB",
default="1GiB",
type=str,
help="memory range for each of the serial links.\
Default: 1GB",
Default: 1GiB",
)
# *****************************PERFORMANCE MONITORING*********************
@@ -390,10 +390,10 @@ def add_options(parser):
# HMC device - vault capacity or size
parser.add_argument(
"--hmc-dev-vault-size",
default="256MB",
default="256MiB",
type=str,
help="vault storage capacity in bytes. Default:\
256MB",
256MiB",
)
parser.add_argument(
"--mem-type",