From e0e65221b47dfa03fb5e3676cb8340b2278fb854 Mon Sep 17 00:00:00 2001 From: Matthew Poremba Date: Mon, 26 Feb 2024 12:48:48 -0600 Subject: [PATCH] arch-vega: Use accum offset for v_accvgpr_read/write The accum offset is used as an index into the unified VGPR register file in MI200 and is not the same as a move if accum_offset in the dispatch packet is non-zero. Change these instructions to use the stored accum_offset value. Change-Id: Ib661804f8f5b8392e4c586082c423645f539e641 --- src/arch/amdgpu/vega/insts/vop3p.cc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/arch/amdgpu/vega/insts/vop3p.cc b/src/arch/amdgpu/vega/insts/vop3p.cc index 85f0af2a51..224c525e0f 100644 --- a/src/arch/amdgpu/vega/insts/vop3p.cc +++ b/src/arch/amdgpu/vega/insts/vop3p.cc @@ -596,10 +596,10 @@ void Inst_VOP3P__V_DOT8_U32_U4::execute(GPUDynInstPtr gpuDynInst) void Inst_VOP3P__V_ACCVGPR_READ::execute(GPUDynInstPtr gpuDynInst) { - // The Acc register file is not supported in gem5 and has been removed - // in MI200. Therefore this instruction becomes a mov. Wavefront *wf = gpuDynInst->wavefront(); - ConstVecOperandU32 src(gpuDynInst, extData.SRC0); + unsigned accum_offset = wf->accumOffset; + + ConstVecOperandU32 src(gpuDynInst, extData.SRC0+accum_offset); VecOperandU32 vdst(gpuDynInst, instData.VDST); src.readSrc(); @@ -615,11 +615,11 @@ void Inst_VOP3P__V_ACCVGPR_READ::execute(GPUDynInstPtr gpuDynInst) void Inst_VOP3P__V_ACCVGPR_WRITE::execute(GPUDynInstPtr gpuDynInst) { - // The Acc register file is not supported in gem5 and has been removed - // in MI200. Therefore this instruction becomes a mov. Wavefront *wf = gpuDynInst->wavefront(); + unsigned accum_offset = wf->accumOffset; + ConstVecOperandU32 src(gpuDynInst, extData.SRC0); - VecOperandU32 vdst(gpuDynInst, instData.VDST); + VecOperandU32 vdst(gpuDynInst, instData.VDST+accum_offset); src.readSrc();