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cpu: Rename initiateHtmCmd to be more generic

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To prepare for future CHI work, rename ExecContext::initiateHtmCmd to
ExecContext::initiateSpecialMemCmd

JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I7c7aed8ec06a66d9023c14dba37eae42907df222
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56598
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Samuel Stark
2021-09-21 17:32:01 +01:00
committed by Giacomo Travaglini
parent a84c987eef
commit de9cdc28ce
11 changed files with 41 additions and 31 deletions
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12
src/cpu/exec_context.hh
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, 2016-2018, 2020 ARM Limited
* Copyright (c) 2014, 2016-2018, 2020-2021 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -144,10 +144,14 @@ class ExecContext
}
/**
* Initiate an HTM command,
* e.g. tell Ruby we're starting/stopping a transaction
* Initiate a Special memory command with no valid address.
* Currently, these instructions need to bypass squashing in the O3 model
* Examples include HTM commands and TLBI commands.
* e.g. tell Ruby we're starting/stopping a HTM transaction,
* or tell Ruby to issue a TLBI operation
*/
virtual Fault initiateHtmCmd(Request::Flags flags) = 0;
virtual Fault initiateSpecialMemCmd(Request::Flags flags) = 0;
/**
* For atomic-mode contexts, perform an atomic memory write operation.
* For timing-mode contexts, initiate a timing memory write operation.