misc: Run pre-commit run --all-files

This is reflect the updates made to black when running `pre-commit
autoupdate`.

Change-Id: Ifb7fea117f354c7f02f26926a5afdf7d67bc5919

src/dev/IntPin.py

@@ -29,6 +29,7 @@ INT_SOURCE_ROLE = "Int Source Pin"
 INT_SINK_ROLE = "Int Sink Pin"
 Port.compat(INT_SOURCE_ROLE, INT_SINK_ROLE)
 
+
 # A source pin generally represents a single pin which might connect to
 # multiple sinks.
 class IntSourcePin(VectorPort):

src/dev/ResetPort.py

@@ -29,6 +29,7 @@ RESET_REQUEST_ROLE = "Reset Request"
 RESET_RESPONSE_ROLE = "Reset Response"
 Port.compat(RESET_REQUEST_ROLE, RESET_RESPONSE_ROLE)
 
+
 # ResetRequestPort is an artifact request port for reset purpose.
 class ResetRequestPort(Port):
     def __init__(self, desc):

src/dev/amdgpu/AMDGPU.py

@@ -34,6 +34,7 @@ from m5.objects.PciDevice import PciMemBar, PciMemUpperBar, PciLegacyIoBar
 from m5.objects.Device import DmaDevice, DmaVirtDevice
 from m5.objects.ClockedObject import ClockedObject
 
+
 # PCI device model for an AMD Vega 10 based GPU. The PCI codes and BARs
 # correspond to a Vega Frontier Edition hardware device. None of the PCI
 # related values in this class should be changed.

src/dev/arm/FlashDevice.py

@@ -38,6 +38,7 @@ from m5.proxy import *
 
 from m5.objects.AbstractNVM import *
 
+
 # Distribution of the data.
 # sequential: sequential (address n+1 is likely to be on the same plane as n)
 # Random: @TODO Not yet implemented

src/dev/lupio/LupioBLK.py

@@ -31,7 +31,6 @@ from m5.proxy import Parent
 
 
 class LupioBLK(DmaDevice):
-
     type = "LupioBLK"
     cxx_class = "gem5::LupioBLK"
     cxx_header = "dev/lupio/lupio_blk.hh"

src/dev/lupio/LupioPIC.py

@@ -29,7 +29,6 @@ from m5.params import Param
 
 
 class LupioPIC(BasicPioDevice):
-
     type = "LupioPIC"
     cxx_class = "gem5::LupioPIC"
     cxx_header = "dev/lupio/lupio_pic.hh"

src/dev/lupio/LupioRNG.py

@@ -30,7 +30,6 @@ from m5.proxy import Parent
 
 
 class LupioRNG(BasicPioDevice):
-
     type = "LupioRNG"
     cxx_class = "gem5::LupioRNG"
     cxx_header = "dev/lupio/lupio_rng.hh"

src/dev/pci/PciHost.py

@@ -76,7 +76,6 @@ class GenericPciHost(PciHost):
         relocatable=0,
         addr=0,
     ):
-
         busf = bus & 0xFF
         devicef = device & 0x1F
         functionf = function & 0x7

src/dev/sparc/T1000.py

@@ -151,6 +151,7 @@ class T1000(Platform):
     puart0 = Uart8250(pio_addr=0x1F10000000)
 
     iob = Iob()
+
     # Attach I/O devices that are on chip
     def attachOnChipIO(self, bus):
         self.iob.pio = bus.mem_side_ports