stdlib: Move 'connect_things' to AbstractBoard constructor

This patch moves 'connect_things' to the AbstractBoard constructor,
thereby meaning it does not need to be called directly in gem5
configuration scripts. This method has been changed to private as a
result.

As boards that inherit from AbstractBoard require certain things to be
setup prior to `connect_things` being called, a new abstract function,
`_setup_board` has been created. This is called in the AbstractBoard
constructor before `connect_things` and can be overridden by boards to
setup board properties as required.

Change-Id: I558a4321b850a6b19e20b7d56d0bcae5805114b6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52184
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/python/gem5/components/boards/abstract_board.py

@@ -92,7 +92,12 @@ class AbstractBoard(System):
         self.memory = memory
         self.cache_hierarchy = cache_hierarchy
 
-        self.setup_memory_ranges()
+
+        # Setup board properties unique to the board being constructed.
+        self._setup_board()
+
+        # Connect the memory, processor, and cache hierarchy.
+        self._connect_things()
 
     def get_processor(self) -> "AbstractProcessor":
         """Get the processor connected to the board.
@@ -135,11 +140,20 @@ class AbstractBoard(System):
 
     def get_clock_domain(self) -> ClockDomain:
         """Get the clock domain.
-
         :returns: The clock domain.
         """
         return self.clk_domain
 
+    @abstractmethod
+    def _setup_board(self) -> None:
+        """
+        This function is called in the AbstractBoard constructor, before the
+        memory, processor, and cache hierarchy components are incorporated via
+        `_connect_thing()`. This function should be overridden by boards to
+        specify components, connections unique to that board.
+        """
+        raise NotImplementedError
+
     # Technically `get_dma_ports` returns a list. This list could be empty to
     # indicate the presense of dma ports. Though I quite like having this
     # boolean to quickly check a board.
@@ -220,7 +234,7 @@ class AbstractBoard(System):
         raise NotImplementedError
 
     @final
-    def connect_things(self) -> None:
+    def _connect_things(self) -> None:
         """Connects all the components to the board.
 
         The order of this board is always:

src/python/gem5/components/boards/riscv_board.py

@@ -90,9 +90,10 @@ class RiscvBoard(AbstractBoard, KernelDiskWorkload):
         super().__init__(
             clk_freq, processor, memory, cache_hierarchy, exit_on_work_items
         )
-
         requires(isa_required=ISA.RISCV)
 
+    @overrides(AbstractBoard)
+    def _setup_board(self) -> None:
         self.workload = RiscvLinux()
 
         # Contains a CLINT, PLIC, UART, and some functions for the dtb, etc.

src/python/gem5/components/boards/simple_board.py

@@ -72,6 +72,8 @@ class SimpleBoard(AbstractBoard):
             exit_on_work_items=exit_on_work_items,
         )
 
+    @overrides(AbstractBoard)
+    def _setup_board(self) -> None:
         # Set up the memory ranges
         self.setup_memory_ranges()
 

src/python/gem5/components/boards/test_board.py

@@ -66,6 +66,8 @@ class TestBoard(AbstractBoard):
             cache_hierarchy=cache_hierarchy,
         )
 
+    @overrides(AbstractBoard)
+    def _setup_board(self) -> None:
         self.setup_memory_ranges()
 
     @overrides(AbstractBoard)

src/python/gem5/components/boards/x86_board.py

@@ -90,6 +90,8 @@ class X86Board(AbstractBoard, KernelDiskWorkload):
 
         requires(isa_required=ISA.X86)
 
+    @overrides(AbstractBoard)
+    def _setup_board(self) -> None:
         self.pc = Pc()
 
         self.workload = X86FsLinux()