Merge branch 'develop' into update-pannotia-tests

This commit is contained in:
Bobby R. Bruce
2024-10-18 13:40:59 -07:00
committed by GitHub
232 changed files with 4652 additions and 883 deletions

View File

@@ -27,11 +27,14 @@
import gzip
import os.path
import shutil
from pathlib import Path
from urllib.request import urlretrieve
from testlib import *
resource_path = joinpath(absdirpath(__file__), "..", "gpu-pannotia-resources")
resource_path = joinpath(
absdirpath(__file__), "..", "resources", "gpu-pannotia"
)
binary_path = joinpath(resource_path, "pannotia-bins")
dataset_path = joinpath(resource_path, "pannotia-datasets")
@@ -52,15 +55,14 @@ if not os.path.isdir(resource_path):
os.makedirs(dataset_path)
for name in binary_links.keys():
if Path(f"{binary_path}/{name}").exists():
continue
urlretrieve(binary_links[name], f"{binary_path}/{name}")
for name in dataset_links.keys():
if Path(f"{dataset_path}/{name}").exists():
continue
urlretrieve(dataset_links[name], f"{dataset_path}/{name}")
with gzip.open(f"{dataset_path}/USA-road-d.NY.gr.gz", "rb") as f_in:
with open(f"{dataset_path}/USA-road-d.NY.gr", "wb") as f_out:
shutil.copyfileobj(f_in, f_out)
os.remove(f"{dataset_path}/USA-road-d.NY.gr.gz")
if len(os.listdir(binary_path)) < len(binary_links):
testlib.log.test_log.warn(
"One or more binaries for the Pannotia GPU tests are missing! Try deleting gpu-pannotia-resources and rerunning."

View File

@@ -207,15 +207,15 @@ print("Running with ISA: " + processor.get_isa().name)
print("Running with protocol: " + get_runtime_coherence_protocol().name)
print()
root = Root(full_system=True, system=motherboard)
# Disable the gdb ports. Required for forking.
m5.disableAllListeners()
root = motherboard._pre_instantiate()
# TODO: This of annoying. Is there a way to fix this to happen
# automatically when running KVM?
root.sim_quantum = int(1e9)
# Disable the gdb ports. Required for forking.
m5.disableAllListeners()
motherboard._pre_instantiate()
m5.instantiate()
# Simulate the inital boot with the starting KVM cpu

View File

@@ -1,3 +1,3 @@
Global frequency set at 1000000000 ticks per second
Beginning simulation!
Exiting @ tick 9981 because Ruby Tester completed
Exiting @ tick 9831 because Ruby Tester completed

View File

@@ -83,9 +83,8 @@ motherboard = TestBoard(
memory=memory,
cache_hierarchy=cache_hierarchy,
)
root = Root(full_system=False, system=motherboard)
motherboard._pre_instantiate()
root = motherboard._pre_instantiate()
m5.instantiate()
generator.start_traffic()

View File

@@ -83,9 +83,8 @@ motherboard = TestBoard(
memory=memory,
cache_hierarchy=cache_hierarchy,
)
root = Root(full_system=False, system=motherboard)
motherboard._pre_instantiate()
root = motherboard._pre_instantiate()
m5.instantiate()
generator.start_traffic()

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@@ -0,0 +1,63 @@
# Copyright (c) 2024 Barcelona Supercomputing Center
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this
# list of conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice,
# this list of conditions and the following disclaimer in the documentation
# and/or other materials provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors
# may be used to endorse or promote products derived from this software without
# specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import os
import re
import sys
from testlib import *
resources = [
"rvv-branch",
"rvv-index",
"rvv-matmul",
"rvv-memcpy",
"rvv-reduce",
"rvv-saxpy",
"rvv-sgemm",
"rvv-strcmp",
"rvv-strcpy",
"rvv-strlen",
"rvv-strlen-fault",
"rvv-strncpy",
]
vlens = [2**x for x in range(7, 15)]
for resource in resources:
out_verifier = verifier.MatchRegex(re.compile(f"^.*{resource}: pass$"))
for vlen in vlens:
gem5_verify_config(
name=f"test-riscv-{resource}-vlen_{vlen}-O3-se-mode",
fixtures=(),
verifiers=(out_verifier,),
config=f"{config.base_dir}/configs/example/gem5_library/riscv-rvv-example.py",
config_args=[resource, f"--vlen={vlen}"],
valid_isas=(constants.all_compiled_tag,),
length=constants.quick_tag,
)

View File

@@ -138,9 +138,11 @@ for x in range(args.num_vectors):
vectors[x_index] = {
"type": "Vector",
"description": stat_tester.subdescs[x]
if x in stat_tester.subdescs
else stat_tester.description,
"description": (
stat_tester.subdescs[x]
if x in stat_tester.subdescs
else stat_tester.description
),
"value": vector,
}

View File

@@ -202,9 +202,7 @@ motherboard = TestBoard(
cache_hierarchy=cache_hierarchy,
)
root = Root(full_system=False, system=motherboard)
motherboard._pre_instantiate()
root = motherboard._pre_instantiate()
m5.instantiate()
generator.start_traffic()