Merge branch 'develop' into update-pannotia-tests
This commit is contained in:
@@ -27,11 +27,14 @@
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import gzip
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import os.path
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import shutil
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from pathlib import Path
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from urllib.request import urlretrieve
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from testlib import *
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resource_path = joinpath(absdirpath(__file__), "..", "gpu-pannotia-resources")
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resource_path = joinpath(
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absdirpath(__file__), "..", "resources", "gpu-pannotia"
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)
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binary_path = joinpath(resource_path, "pannotia-bins")
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dataset_path = joinpath(resource_path, "pannotia-datasets")
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@@ -52,15 +55,14 @@ if not os.path.isdir(resource_path):
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os.makedirs(dataset_path)
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for name in binary_links.keys():
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if Path(f"{binary_path}/{name}").exists():
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continue
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urlretrieve(binary_links[name], f"{binary_path}/{name}")
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for name in dataset_links.keys():
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if Path(f"{dataset_path}/{name}").exists():
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continue
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urlretrieve(dataset_links[name], f"{dataset_path}/{name}")
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with gzip.open(f"{dataset_path}/USA-road-d.NY.gr.gz", "rb") as f_in:
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with open(f"{dataset_path}/USA-road-d.NY.gr", "wb") as f_out:
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shutil.copyfileobj(f_in, f_out)
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os.remove(f"{dataset_path}/USA-road-d.NY.gr.gz")
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if len(os.listdir(binary_path)) < len(binary_links):
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testlib.log.test_log.warn(
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"One or more binaries for the Pannotia GPU tests are missing! Try deleting gpu-pannotia-resources and rerunning."
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@@ -207,15 +207,15 @@ print("Running with ISA: " + processor.get_isa().name)
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print("Running with protocol: " + get_runtime_coherence_protocol().name)
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print()
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root = Root(full_system=True, system=motherboard)
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# Disable the gdb ports. Required for forking.
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m5.disableAllListeners()
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root = motherboard._pre_instantiate()
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# TODO: This of annoying. Is there a way to fix this to happen
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# automatically when running KVM?
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root.sim_quantum = int(1e9)
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# Disable the gdb ports. Required for forking.
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m5.disableAllListeners()
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motherboard._pre_instantiate()
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m5.instantiate()
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# Simulate the inital boot with the starting KVM cpu
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@@ -1,3 +1,3 @@
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Global frequency set at 1000000000 ticks per second
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Beginning simulation!
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Exiting @ tick 9981 because Ruby Tester completed
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Exiting @ tick 9831 because Ruby Tester completed
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@@ -83,9 +83,8 @@ motherboard = TestBoard(
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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root = Root(full_system=False, system=motherboard)
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motherboard._pre_instantiate()
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root = motherboard._pre_instantiate()
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m5.instantiate()
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generator.start_traffic()
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@@ -83,9 +83,8 @@ motherboard = TestBoard(
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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root = Root(full_system=False, system=motherboard)
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motherboard._pre_instantiate()
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root = motherboard._pre_instantiate()
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m5.instantiate()
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generator.start_traffic()
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63
tests/gem5/se_mode/rvv_intrinsic_tests/test.py
Normal file
63
tests/gem5/se_mode/rvv_intrinsic_tests/test.py
Normal file
@@ -0,0 +1,63 @@
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# Copyright (c) 2024 Barcelona Supercomputing Center
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice, this
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# list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its contributors
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# may be used to endorse or promote products derived from this software without
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# specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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import os
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import re
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import sys
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from testlib import *
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resources = [
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"rvv-branch",
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"rvv-index",
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"rvv-matmul",
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"rvv-memcpy",
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"rvv-reduce",
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"rvv-saxpy",
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"rvv-sgemm",
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"rvv-strcmp",
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"rvv-strcpy",
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"rvv-strlen",
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"rvv-strlen-fault",
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"rvv-strncpy",
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]
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vlens = [2**x for x in range(7, 15)]
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for resource in resources:
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out_verifier = verifier.MatchRegex(re.compile(f"^.*{resource}: pass$"))
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for vlen in vlens:
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gem5_verify_config(
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name=f"test-riscv-{resource}-vlen_{vlen}-O3-se-mode",
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fixtures=(),
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verifiers=(out_verifier,),
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config=f"{config.base_dir}/configs/example/gem5_library/riscv-rvv-example.py",
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config_args=[resource, f"--vlen={vlen}"],
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valid_isas=(constants.all_compiled_tag,),
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length=constants.quick_tag,
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)
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@@ -138,9 +138,11 @@ for x in range(args.num_vectors):
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vectors[x_index] = {
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"type": "Vector",
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"description": stat_tester.subdescs[x]
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if x in stat_tester.subdescs
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else stat_tester.description,
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"description": (
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stat_tester.subdescs[x]
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if x in stat_tester.subdescs
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else stat_tester.description
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),
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"value": vector,
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}
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@@ -202,9 +202,7 @@ motherboard = TestBoard(
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cache_hierarchy=cache_hierarchy,
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)
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root = Root(full_system=False, system=motherboard)
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motherboard._pre_instantiate()
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root = motherboard._pre_instantiate()
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m5.instantiate()
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generator.start_traffic()
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