diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 18b8c040de..43857440c2 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -65,6 +65,13 @@ Decoder::Decoder(const ArmDecoderParams &params)
     // Initialize SVE vector length
     sveLen = (dynamic_cast<ISA *>(params.isa)
             ->getCurSveVecLenInBitsAtReset() >> 7) - 1;
+
+    if (dvmEnabled) {
+        warn_once(
+            "DVM Ops instructions are micro-architecturally "
+            "modelled as loads. This will tamper the effective "
+            "number of loads stat\n");
+    }
 }
 
 void