diff --git a/src/arch/arm/insts/tme64ruby.cc b/src/arch/arm/insts/tme64ruby.cc index 99481ba436..f8d9481970 100644 --- a/src/arch/arm/insts/tme64ruby.cc +++ b/src/arch/arm/insts/tme64ruby.cc @@ -109,15 +109,16 @@ Tstart64::completeAcc(PacketPtr pkt, ExecContext *xc, // checkpointing occurs in the outer transaction only if (htm_depth == 1) { - auto new_cpt = new HTMCheckpoint(); + BaseHTMCheckpointPtr& cpt = xc->tcBase()->getHtmCheckpointPtr(); - new_cpt->save(tc); - new_cpt->destinationRegister(dest); + HTMCheckpoint *armcpt = + dynamic_cast(cpt.get()); + assert(armcpt != nullptr); + + armcpt->save(tc); + armcpt->destinationRegister(dest); ArmISA::globalClearExclusive(tc); - - xc->tcBase()->setHtmCheckpointPtr( - std::unique_ptr(new_cpt)); } xc->setIntRegOperand(this, 0, (Dest64) & mask(intWidth)); diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index 9ace2367f4..4ad1125ebc 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -38,6 +38,7 @@ #include "arch/arm/isa.hh" #include "arch/arm/faults.hh" +#include "arch/arm/htm.hh" #include "arch/arm/interrupts.hh" #include "arch/arm/pmu.hh" #include "arch/arm/self_debug.hh" @@ -439,9 +440,15 @@ ISA::startup() { BaseISA::startup(); - if (tc) + if (tc) { setupThreadContext(); + if (haveTME) { + std::unique_ptr cpt(new HTMCheckpoint()); + tc->setHtmCheckpointPtr(std::move(cpt)); + } + } + afterStartup = true; }