From d94ef08a365e51cc5fc341d76f7114d78c663caa Mon Sep 17 00:00:00 2001
From: Roger Chang <rogerycchang@google.com>
Date: Mon, 29 Jan 2024 11:43:27 +0800
Subject: [PATCH] arch-riscv: Fix fence.i instruction in O3 CPU

We should clean the instruction buffer after the fence.i is execute
to avoid execute old instruction for self-modifying code

Change-Id: Iece0ee0d10631fcd9bd17ee67cf0c92f72acdbd8
---
 src/arch/riscv/isa/decoder.isa | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa
index 678e662251..2e291c2b72 100644
--- a/src/arch/riscv/isa/decoder.isa
+++ b/src/arch/riscv/isa/decoder.isa
@@ -771,7 +771,8 @@ decode QUADRANT default Unknown::unknown() {
                 0x0: fence({{
                 }}, uint64_t, IsReadBarrier, IsWriteBarrier, No_OpClass);
                 0x1: fence_i({{
-                }}, uint64_t, IsNonSpeculative, IsSerializeAfter, No_OpClass);
+                }}, uint64_t, IsNonSpeculative, IsSerializeAfter,
+                    IsSquashAfter, No_OpClass);
             }
 
             0x2: decode FUNCT12 {