dev: Align BAR0 size to power of 2 for VirtIO devices

When setting the size of a PCI BAR, the kernel only supports powers of
two (as per the PCI spec). Previously, the size was incorrectly read
by the kernel, and the address ranges assigned to the PCI devices
could overlap, resulting in gem5 crashes.  We now round up to the next
power of two.

Kudos to Sergei Trofimov who helped to debug this issue!

Change-Id: I54ca399b62ea07c09d4cd989b17dfa670e841bbe
Reviewed-by: Anouk Van Laer <anouk.vanlaer@arm.com>
Reviewed-by: Sergei Trofimov <sergei.trofimov@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2580
Reviewed-by: Paul Rosenfeld <prosenfeld@micron.com>

src/dev/virtio/pci.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 ARM Limited
+ * Copyright (c) 2014, 2017 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -39,6 +39,7 @@
 
 #include "dev/virtio/pci.hh"
 
+#include "base/bitfield.hh"
 #include "debug/VIOIface.hh"
 #include "mem/packet_access.hh"
 #include "params/PciVirtIO.hh"
@@ -49,7 +50,12 @@ PciVirtIO::PciVirtIO(const Params *params)
 {
     // Override the subsystem ID with the device ID from VirtIO
     config.subsystemID = htole(vio.deviceId);
-    BARSize[0] = BAR0_SIZE_BASE + vio.configSize;
+
+    // The kernel driver expects the BAR size to be an exact power of
+    // two. Nothing else is supported. Therefore, we need to force
+    // that alignment here. We do not touch vio.configSize as this is
+    // used to check accesses later on.
+    BARSize[0] = alignToPowerOfTwo(BAR0_SIZE_BASE + vio.configSize);
 
     vio.registerKickCallback(&callbackKick);
 }