From d758df4b5ca57dcd1f1b5cd30b272711a60406f5 Mon Sep 17 00:00:00 2001 From: Roger Chang Date: Thu, 14 Sep 2023 11:41:40 +0800 Subject: [PATCH] scons: Update the Kconfig build options The CL updates the Kconfig: 1. Replace the USE_NULL_ISA with BUILD_ISA 2. The USE_XXX_ISAs are depends on BUILD_ISA 3. If the BUILD_ISA is set, at least one of USE_XXX_ISAs must be set 4. Refactor the USE_KVM option Change-Id: I2a600dea9fb671263b0191c46c5790ebbe91a7b8 --- build_opts/ALL | 1 + build_opts/ARM | 1 + build_opts/ARM_MESI_Three_Level | 1 + build_opts/ARM_MESI_Three_Level_HTM | 1 + build_opts/ARM_MOESI_hammer | 1 + build_opts/GCN3_X86 | 1 + build_opts/Garnet_standalone | 1 - build_opts/MIPS | 1 + build_opts/NULL | 1 - build_opts/NULL_MESI_Two_Level | 1 - build_opts/NULL_MOESI_CMP_directory | 1 - build_opts/NULL_MOESI_CMP_token | 1 - build_opts/NULL_MOESI_hammer | 1 - build_opts/POWER | 1 + build_opts/RISCV | 1 + build_opts/SPARC | 1 + build_opts/VEGA_X86 | 1 + build_opts/X86 | 1 + build_opts/X86_MESI_Two_Level | 1 + build_opts/X86_MI_example | 1 + build_opts/X86_MOESI_AMD_Base | 1 + src/arch/Kconfig | 13 ++++++++++++- src/arch/SConscript | 25 +++++++++++-------------- src/arch/null/Kconfig | 27 --------------------------- src/cpu/kvm/Kconfig | 3 +-- src/cpu/minor/SConscript | 2 +- src/cpu/o3/SConscript | 2 +- src/cpu/o3/probe/SConscript | 2 +- src/cpu/simple/SConscript | 2 +- src/cpu/simple/probes/SConscript | 2 +- src/python/gem5/runtime.py | 3 +++ 31 files changed, 47 insertions(+), 55 deletions(-) delete mode 100644 src/arch/null/Kconfig diff --git a/build_opts/ALL b/build_opts/ALL index 7597531c3a..b44c7a09f7 100644 --- a/build_opts/ALL +++ b/build_opts/ALL @@ -1,5 +1,6 @@ RUBY=y RUBY_PROTOCOL_MESI_TWO_LEVEL=y +BUILD_ISA=y USE_ARM_ISA=y USE_MIPS_ISA=y USE_POWER_ISA=y diff --git a/build_opts/ARM b/build_opts/ARM index 998b2cf008..b50f366703 100644 --- a/build_opts/ARM +++ b/build_opts/ARM @@ -1,3 +1,4 @@ +BUILD_ISA=y USE_ARM_ISA=y RUBY=y RUBY_PROTOCOL_CHI=y diff --git a/build_opts/ARM_MESI_Three_Level b/build_opts/ARM_MESI_Three_Level index 3782efb706..4cda128fb1 100644 --- a/build_opts/ARM_MESI_Three_Level +++ b/build_opts/ARM_MESI_Three_Level @@ -1,3 +1,4 @@ +BUILD_ISA=y USE_ARM_ISA=y RUBY=y RUBY_PROTOCOL_MESI_THREE_LEVEL=y diff --git a/build_opts/ARM_MESI_Three_Level_HTM b/build_opts/ARM_MESI_Three_Level_HTM index 04e2a5ebe1..ade6a0dfb6 100644 --- a/build_opts/ARM_MESI_Three_Level_HTM +++ b/build_opts/ARM_MESI_Three_Level_HTM @@ -1,3 +1,4 @@ +BUILD_ISA=y USE_ARM_ISA=y RUBY=y RUBY_PROTOCOL_MESI_THREE_LEVEL_HTM=y diff --git a/build_opts/ARM_MOESI_hammer b/build_opts/ARM_MOESI_hammer index ce8509280f..44038ff493 100644 --- a/build_opts/ARM_MOESI_hammer +++ b/build_opts/ARM_MOESI_hammer @@ -1,3 +1,4 @@ +BUILD_ISA=y USE_ARM_ISA=y RUBY=y RUBY_PROTOCOL_MOESI_HAMMER=y diff --git a/build_opts/GCN3_X86 b/build_opts/GCN3_X86 index 6e5534caf8..fd471871b6 100644 --- a/build_opts/GCN3_X86 +++ b/build_opts/GCN3_X86 @@ -1,5 +1,6 @@ RUBY=y RUBY_PROTOCOL_GPU_VIPER=y +BUILD_ISA=y USE_X86_ISA=y GCN3_GPU_ISA=y BUILD_GPU=y diff --git a/build_opts/Garnet_standalone b/build_opts/Garnet_standalone index 7460c9d73a..5df3d6c74f 100644 --- a/build_opts/Garnet_standalone +++ b/build_opts/Garnet_standalone @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_GARNET_STANDALONE=y -USE_NULL_ISA=y diff --git a/build_opts/MIPS b/build_opts/MIPS index 40955cf999..e60d44ebc4 100644 --- a/build_opts/MIPS +++ b/build_opts/MIPS @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y +BUILD_ISA=y USE_MIPS_ISA=y diff --git a/build_opts/NULL b/build_opts/NULL index d514ef168f..16f4686a5a 100644 --- a/build_opts/NULL +++ b/build_opts/NULL @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y -USE_NULL_ISA=y diff --git a/build_opts/NULL_MESI_Two_Level b/build_opts/NULL_MESI_Two_Level index a6279e6b49..57542472df 100644 --- a/build_opts/NULL_MESI_Two_Level +++ b/build_opts/NULL_MESI_Two_Level @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_MESI_TWO_LEVEL=y -USE_NULL_ISA=y diff --git a/build_opts/NULL_MOESI_CMP_directory b/build_opts/NULL_MOESI_CMP_directory index 88b1de8dbc..3c5308f525 100644 --- a/build_opts/NULL_MOESI_CMP_directory +++ b/build_opts/NULL_MOESI_CMP_directory @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_MOESI_CMP_DIRECTORY=y -USE_NULL_ISA=y diff --git a/build_opts/NULL_MOESI_CMP_token b/build_opts/NULL_MOESI_CMP_token index 5c3308125e..2297bdd722 100644 --- a/build_opts/NULL_MOESI_CMP_token +++ b/build_opts/NULL_MOESI_CMP_token @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_MOESI_CMP_TOKEN=y -USE_NULL_ISA=y diff --git a/build_opts/NULL_MOESI_hammer b/build_opts/NULL_MOESI_hammer index 79cc7de4f9..fe63b9c54c 100644 --- a/build_opts/NULL_MOESI_hammer +++ b/build_opts/NULL_MOESI_hammer @@ -1,3 +1,2 @@ RUBY=y RUBY_PROTOCOL_MOESI_HAMMER=y -USE_NULL_ISA=y diff --git a/build_opts/POWER b/build_opts/POWER index 69f5e395cf..02f7e161d2 100644 --- a/build_opts/POWER +++ b/build_opts/POWER @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y +BUILD_ISA=y USE_POWER_ISA=y diff --git a/build_opts/RISCV b/build_opts/RISCV index 756c39ec02..c0de30e4b5 100644 --- a/build_opts/RISCV +++ b/build_opts/RISCV @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y +BUILD_ISA=y USE_RISCV_ISA=y diff --git a/build_opts/SPARC b/build_opts/SPARC index f2766d5ce4..7f3b544d4a 100644 --- a/build_opts/SPARC +++ b/build_opts/SPARC @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y +BUILD_ISA=y USE_SPARC_ISA=y diff --git a/build_opts/VEGA_X86 b/build_opts/VEGA_X86 index 58187a355d..0e070529ad 100644 --- a/build_opts/VEGA_X86 +++ b/build_opts/VEGA_X86 @@ -1,5 +1,6 @@ RUBY=y RUBY_PROTOCOL_GPU_VIPER=y +BUILD_ISA=y USE_X86_ISA=y VEGA_GPU_ISA=y BUILD_GPU=y diff --git a/build_opts/X86 b/build_opts/X86 index 5167bf8c06..6d6f4d523a 100644 --- a/build_opts/X86 +++ b/build_opts/X86 @@ -1,4 +1,5 @@ RUBY=y NUMBER_BITS_PER_SET=128 RUBY_PROTOCOL_MESI_TWO_LEVEL=y +BUILD_ISA=y USE_X86_ISA=y diff --git a/build_opts/X86_MESI_Two_Level b/build_opts/X86_MESI_Two_Level index 5167bf8c06..6d6f4d523a 100644 --- a/build_opts/X86_MESI_Two_Level +++ b/build_opts/X86_MESI_Two_Level @@ -1,4 +1,5 @@ RUBY=y NUMBER_BITS_PER_SET=128 RUBY_PROTOCOL_MESI_TWO_LEVEL=y +BUILD_ISA=y USE_X86_ISA=y diff --git a/build_opts/X86_MI_example b/build_opts/X86_MI_example index 1388769868..4236851d4d 100644 --- a/build_opts/X86_MI_example +++ b/build_opts/X86_MI_example @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MI_EXAMPLE=y +BUILD_ISA=y USE_X86_ISA=y diff --git a/build_opts/X86_MOESI_AMD_Base b/build_opts/X86_MOESI_AMD_Base index 09b50b6558..ffb7fb73c0 100644 --- a/build_opts/X86_MOESI_AMD_Base +++ b/build_opts/X86_MOESI_AMD_Base @@ -1,3 +1,4 @@ RUBY=y RUBY_PROTOCOL_MOESI_AMD_BASE=y +BUILD_ISA=y USE_X86_ISA=y diff --git a/src/arch/Kconfig b/src/arch/Kconfig index 05d637913e..729265c317 100644 --- a/src/arch/Kconfig +++ b/src/arch/Kconfig @@ -28,10 +28,21 @@ config TARGET_GPU_ISA rsource "amdgpu/Kconfig" +config BUILD_ISA + bool "Build the arch ISA" + default n + +menu "ISA" + +if BUILD_ISA + rsource "arm/Kconfig" rsource "mips/Kconfig" -rsource "null/Kconfig" rsource "power/Kconfig" rsource "riscv/Kconfig" rsource "sparc/Kconfig" rsource "x86/Kconfig" + +endif + +endmenu diff --git a/src/arch/SConscript b/src/arch/SConscript index 7285c0ec59..2426401d73 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -56,20 +56,17 @@ Import('*') # ################################################################# -if env['CONF']['USE_ARM_ISA']: - isa = 'arm' -elif env['CONF']['USE_MIPS_ISA']: - isa = 'mips' -elif env['CONF']['USE_POWER_ISA']: - isa = 'power' -elif env['CONF']['USE_RISCV_ISA']: - isa = 'riscv' -elif env['CONF']['USE_SPARC_ISA']: - isa = 'sparc' -elif env['CONF']['USE_X86_ISA']: - isa = 'x86' -elif env['CONF']['USE_NULL_ISA']: - isa = 'null' +if env['CONF']['BUILD_ISA']: + if ( + not env['CONF']['USE_ARM_ISA'] and + not env['CONF']['USE_MIPS_ISA'] and + not env['CONF']['USE_POWER_ISA'] and + not env['CONF']['USE_RISCV_ISA'] and + not env['CONF']['USE_SPARC_ISA'] and + not env['CONF']['USE_X86_ISA'] + ): + error("At least one ISA need to be set") + amdgpu_isa = ['gcn3', 'vega'] diff --git a/src/arch/null/Kconfig b/src/arch/null/Kconfig deleted file mode 100644 index 64151ecf73..0000000000 --- a/src/arch/null/Kconfig +++ /dev/null @@ -1,27 +0,0 @@ -# Copyright 2022 Google LLC -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -config USE_NULL_ISA - bool "Null ISA support" diff --git a/src/cpu/kvm/Kconfig b/src/cpu/kvm/Kconfig index 824a2e3c41..2b76e94360 100644 --- a/src/cpu/kvm/Kconfig +++ b/src/cpu/kvm/Kconfig @@ -30,5 +30,4 @@ config KVM_ISA config USE_KVM depends on KVM_ISA != "" bool "Enable hardware virtualized (KVM) CPU models" - default y if KVM_ISA != "" - default n + default y diff --git a/src/cpu/minor/SConscript b/src/cpu/minor/SConscript index 9603b4114c..0b98037d6d 100644 --- a/src/cpu/minor/SConscript +++ b/src/cpu/minor/SConscript @@ -40,7 +40,7 @@ Import('*') -if not env['CONF']['USE_NULL_ISA']: +if env['CONF']['BUILD_ISA']: SimObject('BaseMinorCPU.py', sim_objects=[ 'MinorOpClass', 'MinorOpClassSet', 'MinorFUTiming', 'MinorFU', 'MinorFUPool', 'BaseMinorCPU'], diff --git a/src/cpu/o3/SConscript b/src/cpu/o3/SConscript index 2ac703b041..c49db9373d 100755 --- a/src/cpu/o3/SConscript +++ b/src/cpu/o3/SConscript @@ -30,7 +30,7 @@ import sys Import('*') -if not env['CONF']['USE_NULL_ISA']: +if env['CONF']['BUILD_ISA']: SimObject('FUPool.py', sim_objects=['FUPool']) SimObject('FuncUnitConfig.py', sim_objects=[]) SimObject('BaseO3CPU.py', sim_objects=['BaseO3CPU'], enums=[ diff --git a/src/cpu/o3/probe/SConscript b/src/cpu/o3/probe/SConscript index 6039ef2eb9..3065e50a8c 100644 --- a/src/cpu/o3/probe/SConscript +++ b/src/cpu/o3/probe/SConscript @@ -37,7 +37,7 @@ Import('*') -if not env['CONF']['USE_NULL_ISA']: +if env['CONF']['BUILD_ISA']: SimObject('SimpleTrace.py', sim_objects=['SimpleTrace']) Source('simple_trace.cc') DebugFlag('SimpleTrace') diff --git a/src/cpu/simple/SConscript b/src/cpu/simple/SConscript index ffa6467e9b..f2552012bf 100644 --- a/src/cpu/simple/SConscript +++ b/src/cpu/simple/SConscript @@ -28,7 +28,7 @@ Import('*') -if not env['CONF']['USE_NULL_ISA']: +if env['CONF']['BUILD_ISA']: SimObject('BaseAtomicSimpleCPU.py', sim_objects=['BaseAtomicSimpleCPU']) Source('atomic.cc') diff --git a/src/cpu/simple/probes/SConscript b/src/cpu/simple/probes/SConscript index e9fbbb306c..3af318f76f 100644 --- a/src/cpu/simple/probes/SConscript +++ b/src/cpu/simple/probes/SConscript @@ -28,6 +28,6 @@ Import('*') -if not env['CONF']['USE_NULL_ISA']: +if env['CONF']['BUILD_ISA']: SimObject('SimPoint.py', sim_objects=['SimPoint']) Source('simpoint.cc') diff --git a/src/python/gem5/runtime.py b/src/python/gem5/runtime.py index 6eed62a9da..9118237f37 100644 --- a/src/python/gem5/runtime.py +++ b/src/python/gem5/runtime.py @@ -42,6 +42,9 @@ def get_supported_isas() -> Set[ISA]: """ supported_isas = set() + if not buildEnv["BUILD_ISA"]: + return {ISA.NULL} + if "TARGET_ISA" in buildEnv.keys(): supported_isas.add(get_isa_from_str(buildEnv["TARGET_ISA"]))