From d53c0a95eef9023afcef7475033e0e2da4ea5972 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 18 May 2021 18:08:35 -0700 Subject: [PATCH] cpu: Make some compiler guards consistent with the other files. Change-Id: I9dd007ad4ea0e1ff93677333a2f5e1f9b5d2a8fa Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45741 Reviewed-by: Daniel Carvalho Maintainer: Gabe Black Tested-by: kokoro --- src/cpu/pred/ltage.hh | 6 +++--- src/cpu/pred/statistical_corrector.hh | 6 +++--- src/cpu/pred/tage.hh | 6 +++--- src/cpu/pred/tage_base.hh | 6 +++--- src/cpu/pred/tage_sc_l.hh | 7 +++---- src/cpu/pred/tage_sc_l_64KB.hh | 7 +++---- src/cpu/pred/tage_sc_l_8KB.hh | 7 +++---- 7 files changed, 21 insertions(+), 24 deletions(-) diff --git a/src/cpu/pred/ltage.hh b/src/cpu/pred/ltage.hh index 8e8d428e96..95139b7f5c 100644 --- a/src/cpu/pred/ltage.hh +++ b/src/cpu/pred/ltage.hh @@ -46,8 +46,8 @@ * one that predicted when the prediction is incorrect. */ -#ifndef __CPU_PRED_LTAGE -#define __CPU_PRED_LTAGE +#ifndef __CPU_PRED_LTAGE_HH__ +#define __CPU_PRED_LTAGE_HH__ #include @@ -109,4 +109,4 @@ class LTAGE : public TAGE ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override; }; -#endif // __CPU_PRED_LTAGE +#endif // __CPU_PRED_LTAGE_HH__ diff --git a/src/cpu/pred/statistical_corrector.hh b/src/cpu/pred/statistical_corrector.hh index c36a1689a0..11755683a3 100644 --- a/src/cpu/pred/statistical_corrector.hh +++ b/src/cpu/pred/statistical_corrector.hh @@ -39,8 +39,8 @@ * Statistical corrector base class */ -#ifndef __CPU_PRED_STATISTICAL_CORRECTOR_HH -#define __CPU_PRED_STATISTICAL_CORRECTOR_HH +#ifndef __CPU_PRED_STATISTICAL_CORRECTOR_HH__ +#define __CPU_PRED_STATISTICAL_CORRECTOR_HH__ #include "base/statistics.hh" #include "base/types.hh" @@ -273,4 +273,4 @@ class StatisticalCorrector : public SimObject virtual size_t getSizeInBits() const; }; -#endif//__CPU_PRED_STATISTICAL_CORRECTOR_HH +#endif//__CPU_PRED_STATISTICAL_CORRECTOR_HH__ diff --git a/src/cpu/pred/tage.hh b/src/cpu/pred/tage.hh index 71ee4ac582..ec4fce9d97 100644 --- a/src/cpu/pred/tage.hh +++ b/src/cpu/pred/tage.hh @@ -45,8 +45,8 @@ * one that predicted when the prediction is incorrect. */ -#ifndef __CPU_PRED_TAGE -#define __CPU_PRED_TAGE +#ifndef __CPU_PRED_TAGE_HH__ +#define __CPU_PRED_TAGE_HH__ #include @@ -90,4 +90,4 @@ class TAGE: public BPredUnit virtual void squash(ThreadID tid, void *bp_history) override; }; -#endif // __CPU_PRED_TAGE +#endif // __CPU_PRED_TAGE_HH__ diff --git a/src/cpu/pred/tage_base.hh b/src/cpu/pred/tage_base.hh index 41992990a9..e79fac3674 100644 --- a/src/cpu/pred/tage_base.hh +++ b/src/cpu/pred/tage_base.hh @@ -45,8 +45,8 @@ * one that predicted when the prediction is incorrect. */ -#ifndef __CPU_PRED_TAGE_BASE -#define __CPU_PRED_TAGE_BASE +#ifndef __CPU_PRED_TAGE_BASE_HH__ +#define __CPU_PRED_TAGE_BASE_HH__ #include @@ -505,4 +505,4 @@ class TAGEBase : public SimObject } stats; }; -#endif // __CPU_PRED_TAGE_BASE +#endif // __CPU_PRED_TAGE_BASE_HH__ diff --git a/src/cpu/pred/tage_sc_l.hh b/src/cpu/pred/tage_sc_l.hh index 10e3c1fbd5..6691928ec1 100644 --- a/src/cpu/pred/tage_sc_l.hh +++ b/src/cpu/pred/tage_sc_l.hh @@ -40,8 +40,8 @@ * It consits of a TAGE + a statistical corrector (SC) + a loop predictor (L) */ -#ifndef __CPU_PRED_TAGE_SC_L -#define __CPU_PRED_TAGE_SC_L +#ifndef __CPU_PRED_TAGE_SC_L_HH__ +#define __CPU_PRED_TAGE_SC_L_HH__ #include "cpu/pred/ltage.hh" #include "cpu/pred/statistical_corrector.hh" @@ -185,5 +185,4 @@ class TAGE_SC_L: public LTAGE }; -#endif // __CPU_PRED_TAGE_SC_L - +#endif // __CPU_PRED_TAGE_SC_L_HH__ diff --git a/src/cpu/pred/tage_sc_l_64KB.hh b/src/cpu/pred/tage_sc_l_64KB.hh index 87b49bec44..00bc896a66 100644 --- a/src/cpu/pred/tage_sc_l_64KB.hh +++ b/src/cpu/pred/tage_sc_l_64KB.hh @@ -42,8 +42,8 @@ * http://www.jilp.org/cbp2016/code/AndreSeznecLimited.tar.gz */ -#ifndef __CPU_PRED_TAGE_SC_L_64KB -#define __CPU_PRED_TAGE_SC_L_64KB +#ifndef __CPU_PRED_TAGE_SC_L_64KB_HH__ +#define __CPU_PRED_TAGE_SC_L_64KB_HH__ #include "cpu/pred/tage_sc_l.hh" #include "params/TAGE_SC_L_64KB.hh" @@ -132,5 +132,4 @@ class TAGE_SC_L_64KB : public TAGE_SC_L TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams ¶ms); }; -#endif // __CPU_PRED_TAGE_SC_L_64KB - +#endif // __CPU_PRED_TAGE_SC_L_64KB_HH__ diff --git a/src/cpu/pred/tage_sc_l_8KB.hh b/src/cpu/pred/tage_sc_l_8KB.hh index 2cabbca9ef..fe249de1bb 100644 --- a/src/cpu/pred/tage_sc_l_8KB.hh +++ b/src/cpu/pred/tage_sc_l_8KB.hh @@ -39,8 +39,8 @@ * 8KB TAGE-SC-L branch predictor (devised by Andre Seznec) */ -#ifndef __CPU_PRED_TAGE_SC_L_8KB -#define __CPU_PRED_TAGE_SC_L_8KB +#ifndef __CPU_PRED_TAGE_SC_L_8KB_HH__ +#define __CPU_PRED_TAGE_SC_L_8KB_HH__ #include "cpu/pred/tage_sc_l.hh" #include "params/TAGE_SC_L_8KB.hh" @@ -112,5 +112,4 @@ class TAGE_SC_L_8KB : public TAGE_SC_L TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams ¶ms); }; -#endif // __CPU_PRED_TAGE_SC_L_8KB - +#endif // __CPU_PRED_TAGE_SC_L_8KB_HH__