arch, cpu, dev, gpu, mem, sim, python: start using getPort.

Replace the getMasterPort, getSlavePort, and getEthPort functions
with getPort, and remove extraneous mechanisms that are no longer
necessary.

Change-Id: Iab7e3c02d2f3a0cf33e7e824e18c28646b5bc318
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17040
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Gabe Black
2019-03-07 03:02:35 -08:00
parent 378d9ccbeb
commit d3d24835bc
108 changed files with 396 additions and 751 deletions

View File

@@ -262,13 +262,13 @@ DmaPort::sendDma()
panic("Unknown memory mode.");
}
BaseMasterPort &
DmaDevice::getMasterPort(const std::string &if_name, PortID idx)
Port &
DmaDevice::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "dma") {
return dmaPort;
}
return PioDevice::getMasterPort(if_name, idx);
return PioDevice::getPort(if_name, idx);
}

View File

@@ -179,8 +179,8 @@ class DmaDevice : public PioDevice
unsigned int cacheBlockSize() const { return sys->cacheLineSize(); }
BaseMasterPort &getMasterPort(const std::string &if_name,
PortID idx = InvalidPortID) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
};

View File

@@ -87,13 +87,13 @@ PioDevice::init()
pioPort.sendRangeChange();
}
BaseSlavePort &
PioDevice::getSlavePort(const std::string &if_name, PortID idx)
Port &
PioDevice::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "pio") {
return pioPort;
}
return MemObject::getSlavePort(if_name, idx);
return MemObject::getPort(if_name, idx);
}
BasicPioDevice::BasicPioDevice(const Params *p, Addr size)

View File

@@ -125,8 +125,8 @@ class PioDevice : public MemObject
virtual void init();
virtual BaseSlavePort &getSlavePort(const std::string &if_name,
PortID idx = InvalidPortID);
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
friend class PioPort;

View File

@@ -47,7 +47,6 @@ from m5.objects.PciDevice import PciDevice
class EtherLink(SimObject):
type = 'EtherLink'
cxx_header = "dev/net/etherlink.hh"
cxx_extra_bases = [ "EtherObject" ]
int0 = SlavePort("interface 0")
int1 = SlavePort("interface 1")
delay = Param.Latency('0us', "packet transmit delay")
@@ -58,7 +57,6 @@ class EtherLink(SimObject):
class DistEtherLink(SimObject):
type = 'DistEtherLink'
cxx_header = "dev/net/dist_etherlink.hh"
cxx_extra_bases = [ "EtherObject" ]
int0 = SlavePort("interface 0")
delay = Param.Latency('0us', "packet transmit delay")
delay_var = Param.Latency('0ns', "packet transmit delay variability")
@@ -77,7 +75,6 @@ class DistEtherLink(SimObject):
class EtherBus(SimObject):
type = 'EtherBus'
cxx_header = "dev/net/etherbus.hh"
cxx_extra_bases = [ "EtherObject" ]
loopback = Param.Bool(True, "send packet back to the sending interface")
dump = Param.EtherDump(NULL, "dump object")
speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second")
@@ -85,7 +82,6 @@ class EtherBus(SimObject):
class EtherSwitch(SimObject):
type = 'EtherSwitch'
cxx_header = "dev/net/etherswitch.hh"
cxx_extra_bases = [ "EtherObject" ]
dump = Param.EtherDump(NULL, "dump object")
fabric_speed = Param.NetworkBandwidth('10Gbps', "switch fabric speed in bits "
"per second")
@@ -99,7 +95,6 @@ class EtherTapBase(SimObject):
type = 'EtherTapBase'
abstract = True
cxx_header = "dev/net/ethertap.hh"
cxx_extra_bases = [ "EtherObject" ]
bufsz = Param.Int(10000, "tap buffer size")
dump = Param.EtherDump(NULL, "dump object")
tap = SlavePort("Ethernet interface to connect to gem5's network")
@@ -127,7 +122,6 @@ class EtherDevice(PciDevice):
type = 'EtherDevice'
abstract = True
cxx_header = "dev/net/etherdevice.hh"
cxx_extra_bases = [ "EtherObject" ]
interface = MasterPort("Ethernet Interface")
class IGbE(EtherDevice):

View File

@@ -45,7 +45,6 @@
Import('*')
SimObject('Ethernet.py')
Source('python.cc', add_tags='python')
# Basic Ethernet infrastructure
Source('etherbus.cc')

View File

@@ -61,7 +61,6 @@
#include "dev/net/etherdump.hh"
#include "dev/net/etherint.hh"
#include "dev/net/etherlink.hh"
#include "dev/net/etherobject.hh"
#include "dev/net/etherpkt.hh"
#include "dev/net/tcp_iface.hh"
#include "params/EtherLink.hh"
@@ -109,15 +108,12 @@ DistEtherLink::~DistEtherLink()
delete distIface;
}
EtherInt*
DistEtherLink::getEthPort(const std::string &if_name, int idx)
Port &
DistEtherLink::getPort(const std::string &if_name, PortID idx)
{
if (if_name != "int0") {
return nullptr;
} else {
panic_if(localIface->getPeer(), "interface already connected to");
}
return localIface;
if (if_name == "int0")
return *localIface;
return SimObject::getPort(if_name, idx);
}
void

View File

@@ -53,7 +53,6 @@
#include <iostream>
#include "dev/net/etherlink.hh"
#include "dev/net/etherobject.hh"
#include "params/DistEtherLink.hh"
class DistIface;
@@ -62,7 +61,7 @@ class EthPacketData;
/**
* Model for a fixed bandwidth full duplex ethernet link.
*/
class DistEtherLink : public SimObject, public EtherObject
class DistEtherLink : public SimObject
{
protected:
class LocalIface;
@@ -224,7 +223,8 @@ class DistEtherLink : public SimObject, public EtherObject
return dynamic_cast<const Params *>(_params);
}
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
virtual void init() override;
virtual void startup() override;

View File

@@ -81,8 +81,8 @@ EtherBus::txDone()
packet = 0;
}
EtherInt*
EtherBus::getEthPort(const std::string &if_name, int idx)
Port &
EtherBus::getPort(const std::string &if_name, PortID idx)
{
panic("Etherbus doesn't work\n");
}

View File

@@ -35,7 +35,6 @@
#ifndef __DEV_NET_ETHERBUS_HH__
#define __DEV_NET_ETHERBUS_HH__
#include "dev/net/etherobject.hh"
#include "dev/net/etherpkt.hh"
#include "params/EtherBus.hh"
#include "sim/eventq.hh"
@@ -43,7 +42,7 @@
class EtherDump;
class EtherInt;
class EtherBus : public SimObject, public EtherObject
class EtherBus : public SimObject
{
protected:
typedef std::list<EtherInt *> devlist_t;
@@ -72,7 +71,8 @@ class EtherBus : public SimObject, public EtherObject
void reg(EtherInt *dev);
bool busy() const { return (bool)packet; }
bool send(EtherInt *sender, EthPacketPtr &packet);
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
};
#endif // __DEV_NET_ETHERBUS_HH__

View File

@@ -37,7 +37,6 @@
#define __DEV_NET_ETHERDEVICE_HH__
#include "base/statistics.hh"
#include "dev/net/etherobject.hh"
#include "dev/pci/device.hh"
#include "params/EtherDevBase.hh"
#include "params/EtherDevice.hh"
@@ -45,7 +44,7 @@
class EtherInt;
class EtherDevice : public PciDevice, public EtherObject
class EtherDevice : public PciDevice
{
public:
typedef EtherDeviceParams Params;

View File

@@ -88,20 +88,14 @@ EtherLink::~EtherLink()
delete interface[1];
}
EtherInt*
EtherLink::getEthPort(const std::string &if_name, int idx)
Port &
EtherLink::getPort(const std::string &if_name, PortID idx)
{
Interface *i;
if (if_name == "int0")
i = interface[0];
return *interface[0];
else if (if_name == "int1")
i = interface[1];
else
return NULL;
if (i->getPeer())
panic("interface already connected to\n");
return i;
return *interface[1];
return SimObject::getPort(if_name, idx);
}

View File

@@ -51,7 +51,6 @@
#include "base/types.hh"
#include "dev/net/etherint.hh"
#include "dev/net/etherobject.hh"
#include "dev/net/etherpkt.hh"
#include "params/EtherLink.hh"
#include "sim/eventq.hh"
@@ -62,7 +61,7 @@ class Checkpoint;
/*
* Model for a fixed bandwidth full duplex ethernet link
*/
class EtherLink : public EtherObject, public SimObject
class EtherLink : public SimObject
{
protected:
class Interface;
@@ -152,7 +151,8 @@ class EtherLink : public EtherObject, public SimObject
return dynamic_cast<const Params *>(_params);
}
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;

View File

@@ -1,54 +0,0 @@
/*
* Copyright (c) 2007 The Regents of The University of Michigan
* Copyright 2019 Google, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Ali Saidi
* Gabe Black
*/
/**
* @file
* Base Ethernet Object declaration.
*/
#ifndef __DEV_NET_ETHEROBJECT_HH__
#define __DEV_NET_ETHEROBJECT_HH__
#include <string>
class EtherInt;
/**
* The base EtherObject interface.
*/
class EtherObject
{
public:
virtual EtherInt *getEthPort(const std::string &if_name, int idx=-1) = 0;
};
#endif // __DEV_NET_ETHEROBJECT_HH__

View File

@@ -62,16 +62,15 @@ EtherSwitch::~EtherSwitch()
interfaces.clear();
}
EtherInt*
EtherSwitch::getEthPort(const std::string &if_name, int idx)
Port &
EtherSwitch::getPort(const std::string &if_name, PortID idx)
{
if (idx < 0 || idx >= interfaces.size())
return nullptr;
if (if_name == "interface") {
panic_if(idx < 0 || idx >= interfaces.size(), "index out of bounds");
return *interfaces.at(idx);
}
Interface *interface = interfaces.at(idx);
panic_if(interface->getPeer(), "interface already connected\n");
return interface;
return SimObject::getPort(if_name, idx);
}
bool

View File

@@ -42,14 +42,13 @@
#include "base/inet.hh"
#include "dev/net/etherint.hh"
#include "dev/net/etherlink.hh"
#include "dev/net/etherobject.hh"
#include "dev/net/etherpkt.hh"
#include "dev/net/pktfifo.hh"
#include "params/EtherSwitch.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
class EtherSwitch : public SimObject, public EtherObject
class EtherSwitch : public SimObject
{
public:
typedef EtherSwitchParams Params;
@@ -62,7 +61,8 @@ class EtherSwitch : public SimObject, public EtherObject
return dynamic_cast<const Params*>(_params);
}
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
protected:
/**

View File

@@ -159,15 +159,12 @@ EtherTapBase::stopPolling()
}
EtherInt*
EtherTapBase::getEthPort(const std::string &if_name, int idx)
Port &
EtherTapBase::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "tap") {
if (interface->getPeer())
panic("Interface already connected to\n");
return interface;
}
return NULL;
if (if_name == "tap")
return *interface;
return SimObject::getPort(if_name, idx);
}
bool

View File

@@ -41,7 +41,6 @@
#include "base/pollevent.hh"
#include "config/use_tuntap.hh"
#include "dev/net/etherint.hh"
#include "dev/net/etherobject.hh"
#include "dev/net/etherpkt.hh"
#if USE_TUNTAP
@@ -56,7 +55,7 @@
class TapEvent;
class EtherTapInt;
class EtherTapBase : public SimObject, public EtherObject
class EtherTapBase : public SimObject
{
public:
typedef EtherTapBaseParams Params;
@@ -101,7 +100,8 @@ class EtherTapBase : public SimObject, public EtherObject
EtherTapInt *interface;
public:
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
bool recvSimulated(EthPacketPtr packet);
void sendSimulated(void *data, size_t len);

View File

@@ -139,16 +139,12 @@ IGbE::init()
PciDevice::init();
}
EtherInt*
IGbE::getEthPort(const std::string &if_name, int idx)
Port &
IGbE::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "interface") {
if (etherInt->getPeer())
panic("Port already connected to\n");
return etherInt;
}
return NULL;
if (if_name == "interface")
return *etherInt;
return EtherDevice::getPort(if_name, idx);
}
Tick

View File

@@ -519,7 +519,8 @@ class IGbE : public EtherDevice
~IGbE();
void init() override;
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
Tick lastInterrupt;

View File

@@ -173,15 +173,12 @@ NSGigE::writeConfig(PacketPtr pkt)
return configDelay;
}
EtherInt*
NSGigE::getEthPort(const std::string &if_name, int idx)
Port &
NSGigE::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "interface") {
if (interface->getPeer())
panic("interface already connected to\n");
return interface;
}
return NULL;
if (if_name == "interface")
return *interface;
return EtherDevBase::getPort(if_name, idx);
}
/**

View File

@@ -341,7 +341,8 @@ class NSGigE : public EtherDevBase
NSGigE(Params *params);
~NSGigE();
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
Tick writeConfig(PacketPtr pkt) override;

View File

@@ -1,48 +0,0 @@
/*
* Copyright 2019 Google, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
#include "python/pybind11/pybind.hh"
#include "dev/net/etherobject.hh"
#include "sim/init.hh"
namespace
{
void
ethernet_pybind(pybind11::module &m_internal)
{
pybind11::module m = m_internal.def_submodule("ethernet");
pybind11::class_<
EtherObject, std::unique_ptr<EtherObject, pybind11::nodelete>>(
m, "EtherObject");
}
EmbeddedPyBind embed_("ethernet", &ethernet_pybind);
} // anonymous namespace

View File

@@ -142,16 +142,12 @@ Device::resetStats()
_maxVnicDistance = 0;
}
EtherInt*
Device::getEthPort(const std::string &if_name, int idx)
Port &
Device::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "interface") {
if (interface->getPeer())
panic("interface already connected to\n");
return interface;
}
return NULL;
if (if_name == "interface")
return *interface;
return EtherDevBase::getPort(if_name, idx);
}

View File

@@ -230,7 +230,8 @@ class Device : public Base
public:
bool recvPacket(EthPacketPtr packet);
void transferDone();
EtherInt *getEthPort(const std::string &if_name, int idx) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
/**
* DMA parameters

View File

@@ -113,24 +113,24 @@ CopyEngine::CopyEngineChannel::~CopyEngineChannel()
delete [] copyBuffer;
}
BaseMasterPort &
CopyEngine::getMasterPort(const std::string &if_name, PortID idx)
Port &
CopyEngine::getPort(const std::string &if_name, PortID idx)
{
if (if_name != "dma") {
// pass it along to our super class
return PciDevice::getMasterPort(if_name, idx);
return PciDevice::getPort(if_name, idx);
} else {
if (idx >= static_cast<int>(chan.size())) {
panic("CopyEngine::getMasterPort: unknown index %d\n", idx);
panic("CopyEngine::getPort: unknown index %d\n", idx);
}
return chan[idx]->getMasterPort();
return chan[idx]->getPort();
}
}
BaseMasterPort &
CopyEngine::CopyEngineChannel::getMasterPort()
Port &
CopyEngine::CopyEngineChannel::getPort()
{
return cePort;
}

View File

@@ -95,7 +95,7 @@ class CopyEngine : public PciDevice
public:
CopyEngineChannel(CopyEngine *_ce, int cid);
virtual ~CopyEngineChannel();
BaseMasterPort &getMasterPort();
Port &getPort();
std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); }
virtual Tick read(PacketPtr pkt)
@@ -193,8 +193,8 @@ class CopyEngine : public PciDevice
void regStats() override;
BaseMasterPort &getMasterPort(const std::string &if_name,
PortID idx = InvalidPortID) override;
Port &getPort(const std::string &if_name,
PortID idx = InvalidPortID) override;
Tick read(PacketPtr pkt) override;
Tick write(PacketPtr pkt) override;

View File

@@ -70,12 +70,12 @@ X86ISA::I82094AA::init()
IntDevice::init();
}
BaseMasterPort &
X86ISA::I82094AA::getMasterPort(const std::string &if_name, PortID idx)
Port &
X86ISA::I82094AA::getPort(const std::string &if_name, PortID idx)
{
if (if_name == "int_master")
return intMasterPort;
return BasicPioDevice::getMasterPort(if_name, idx);
return BasicPioDevice::getPort(if_name, idx);
}
AddrRangeList

View File

@@ -102,8 +102,8 @@ class I82094AA : public BasicPioDevice, public IntDevice
void writeReg(uint8_t offset, uint32_t value);
uint32_t readReg(uint8_t offset);
BaseMasterPort &getMasterPort(const std::string &if_name,
PortID idx = InvalidPortID) override;
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;
Tick recvResponse(PacketPtr pkt) override;