cpu: Remove alpha specialized code.

Change-Id: I770132af2f11ed232a100ab8bef942f17789ef36
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24648
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/cpu/o3/commit_impl.hh

@@ -1053,11 +1053,8 @@ DefaultCommit<Impl>::commitInsts()
                 // Set the doneSeqNum to the youngest committed instruction.
                 toIEW->commitInfo[tid].doneSeqNum = head_inst->seqNum;
 
-                if (tid == 0) {
-                    canHandleInterrupts =  (!head_inst->isDelayedCommit()) &&
-                                           ((THE_ISA != ALPHA_ISA) ||
-                                             (!(pc[0].instAddr() & 0x3)));
-                }
+                if (tid == 0)
+                    canHandleInterrupts = !head_inst->isDelayedCommit();
 
                 // at this point store conditionals should either have
                 // been completed or predicated false