From d131ff488e4b5f88c019c3473ab8f76af41f3b2a Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Mon, 30 Oct 2023 10:43:22 +0000 Subject: [PATCH] arch-arm: Set UNCACHEABLE flag in Request in SE mode (#515) As pointed out by [1], Arm doesn't seem to respect the cacheability attribute when mapping uncacheable memory. This is because the request is not tagged as uncacheable during SE translation With this patch we are checking for the cacheability attribute before finalizing translation [1]: https://github.com/gem5/gem5/issues/509 Change-Id: I42df0e119af61763971d5766ae764a540055781b Signed-off-by: Giacomo Travaglini --- src/arch/arm/mmu.cc | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/arch/arm/mmu.cc b/src/arch/arm/mmu.cc index 824974ab21..956f95d3b3 100644 --- a/src/arch/arm/mmu.cc +++ b/src/arch/arm/mmu.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013, 2016-2022 Arm Limited + * Copyright (c) 2010-2013, 2016-2023 Arm Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -263,14 +263,17 @@ MMU::translateSe(const RequestPtr &req, ThreadContext *tc, Mode mode, } } - Addr paddr; Process *p = tc->getProcessPtr(); - - if (!p->pTable->translate(vaddr, paddr)) + if (const auto pte = p->pTable->lookup(vaddr); !pte) { return std::make_shared(vaddr_tainted); - req->setPaddr(paddr); + } else { + req->setPaddr(pte->paddr + p->pTable->pageOffset(vaddr)); - return finalizePhysical(req, tc, mode); + if (pte->flags & EmulationPageTable::Uncacheable) + req->setFlags(Request::UNCACHEABLE); + + return finalizePhysical(req, tc, mode); + } } Fault