derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge ARM into the head. ARM will compile but may not actually work.

Browse Source
This commit is contained in:
Gabe Black
2009-04-06 10:19:36 -07:00
parent 7a7c4c5fca 639cb0a42d
commit d080581db1
1238 changed files with 77272 additions and 36447 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
src/arch/arm/process.cc
View File

@@ -43,8 +43,7 @@
using namespace std;
using namespace ArmISA;
ArmLiveProcess::ArmLiveProcess(LiveProcessParams * params,
ObjectFile *objFile)
ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile)
: LiveProcess(params, objFile)
{
stack_base = 0xc0000000L;
@@ -147,12 +146,35 @@ ArmLiveProcess::argsInit(int intSize, int pageSize)
initVirtMem->writeBlob(0xffff0fe0, insns, 8);
*/
threadContexts[0]->setIntReg(ArgumentReg1, argc);
threadContexts[0]->setIntReg(ArgumentReg2, argv_array_base);
threadContexts[0]->setIntReg(StackPointerReg, stack_min);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
tc->setIntReg(ArgumentReg1, argc);
tc->setIntReg(ArgumentReg2, argv_array_base);
tc->setIntReg(StackPointerReg, stack_min);
Addr prog_entry = objFile->entryPoint();
threadContexts[0]->setPC(prog_entry);
threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
tc->setPC(prog_entry);
tc->setNextPC(prog_entry + sizeof(MachInst));
}
ArmISA::IntReg
ArmLiveProcess::getSyscallArg(ThreadContext *tc, int i)
{
assert(i < 4);
return tc->readIntReg(ArgumentReg0 + i);
}
void
ArmLiveProcess::setSyscallArg(ThreadContext *tc,
int i, ArmISA::IntReg val)
{
assert(i < 4);
tc->setIntReg(ArgumentReg0 + i, val);
}
void
ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
SyscallReturn return_value)
{
tc->setIntReg(ReturnValueReg, return_value.value());
}