CPU: Add abandoned instructions to O3 Pipe Viewer
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@@ -58,7 +58,6 @@
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#include "debug/Commit.hh"
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#include "debug/CommitRate.hh"
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#include "debug/ExecFaulting.hh"
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#include "debug/O3PipeView.hh"
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#include "params/DerivO3CPU.hh"
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#include "sim/faults.hh"
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#include "sim/full_system.hh"
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@@ -1219,19 +1218,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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rob->retireHead(tid);
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#if TRACING_ON
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// Print info needed by the pipeline activity viewer.
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DPRINTFR(O3PipeView, "O3PipeView:fetch:%llu:0x%08llx:%d:%llu:%s\n",
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head_inst->fetchTick,
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head_inst->instAddr(),
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head_inst->microPC(),
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head_inst->seqNum,
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head_inst->staticInst->disassemble(head_inst->instAddr()));
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DPRINTFR(O3PipeView, "O3PipeView:decode:%llu\n", head_inst->fetchTick + head_inst->decodeTick);
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DPRINTFR(O3PipeView, "O3PipeView:rename:%llu\n", head_inst->fetchTick + head_inst->renameTick);
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DPRINTFR(O3PipeView, "O3PipeView:dispatch:%llu\n", head_inst->fetchTick + head_inst->dispatchTick);
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DPRINTFR(O3PipeView, "O3PipeView:issue:%llu\n", head_inst->fetchTick + head_inst->issueTick);
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DPRINTFR(O3PipeView, "O3PipeView:complete:%llu\n", head_inst->fetchTick + head_inst->completeTick);
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DPRINTFR(O3PipeView, "O3PipeView:retire:%llu\n", curTick());
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head_inst->commitTick = curTick() - head_inst->fetchTick;
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#endif
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// If this was a store, record it for this cycle.
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@@ -93,6 +93,8 @@ class BaseO3DynInst : public BaseDynInst<Impl>
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/** BaseDynInst constructor given a static inst pointer. */
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BaseO3DynInst(StaticInstPtr _staticInst, StaticInstPtr _macroop);
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~BaseO3DynInst();
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/** Executes the instruction.*/
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Fault execute();
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@@ -123,12 +125,13 @@ class BaseO3DynInst : public BaseDynInst<Impl>
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public:
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#if TRACING_ON
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/** Tick records used for the pipeline activity viewer. */
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Tick fetchTick;
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uint32_t decodeTick;
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uint32_t renameTick;
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uint32_t dispatchTick;
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uint32_t issueTick;
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uint32_t completeTick;
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Tick fetchTick; // instruction fetch is completed.
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int32_t decodeTick; // instruction enters decode phase
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int32_t renameTick; // instruction enters rename phase
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int32_t dispatchTick;
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int32_t issueTick;
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int32_t completeTick;
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int32_t commitTick;
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#endif
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/** Reads a misc. register, including any side-effects the read
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@@ -43,6 +43,7 @@
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#include "base/cp_annotate.hh"
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#include "cpu/o3/dyn_inst.hh"
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#include "sim/full_system.hh"
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#include "debug/O3PipeView.hh"
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template <class Impl>
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BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
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@@ -62,6 +63,33 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst,
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initVars();
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}
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template <class Impl>BaseO3DynInst<Impl>::~BaseO3DynInst()
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{
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#if TRACING_ON
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Tick val, fetch = this->fetchTick;
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// Print info needed by the pipeline activity viewer.
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DPRINTFR(O3PipeView, "O3PipeView:fetch:%llu:0x%08llx:%d:%llu:%s\n",
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fetch,
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this->instAddr(),
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this->microPC(),
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this->seqNum,
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this->staticInst->disassemble(this->instAddr()));
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val = (this->decodeTick == -1) ? 0 : fetch + this->decodeTick;
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DPRINTFR(O3PipeView, "O3PipeView:decode:%llu\n", val);
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val = (this->renameTick == -1) ? 0 : fetch + this->renameTick;
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DPRINTFR(O3PipeView, "O3PipeView:rename:%llu\n", val);
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val = (this->dispatchTick == -1) ? 0 : fetch + this->dispatchTick;
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DPRINTFR(O3PipeView, "O3PipeView:dispatch:%llu\n", val);
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val = (this->issueTick == -1) ? 0 : fetch + this->issueTick;
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DPRINTFR(O3PipeView, "O3PipeView:issue:%llu\n", val);
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val = (this->completeTick == -1) ? 0 : fetch + this->completeTick;
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DPRINTFR(O3PipeView, "O3PipeView:complete:%llu\n", val);
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val = (this->commitTick == -1) ? 0 : fetch + this->commitTick;
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DPRINTFR(O3PipeView, "O3PipeView:retire:%llu\n", val);
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#endif
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};
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template <class Impl>
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void
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BaseO3DynInst<Impl>::initVars()
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@@ -82,12 +110,15 @@ BaseO3DynInst<Impl>::initVars()
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_numDestMiscRegs = 0;
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#if TRACING_ON
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fetchTick = 0;
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decodeTick = 0;
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renameTick = 0;
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dispatchTick = 0;
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issueTick = 0;
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completeTick = 0;
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// Value -1 indicates that particular phase
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// hasn't happened (yet).
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fetchTick = -1;
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decodeTick = -1;
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renameTick = -1;
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dispatchTick = -1;
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issueTick = -1;
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completeTick = -1;
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commitTick = -1;
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#endif
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}
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