ruby: FS support using the new configuration system

This commit is contained in:
Brad Beckmann
2010-01-29 20:29:21 -08:00
parent dc758641c9
commit ce2d13195b
9 changed files with 108 additions and 152 deletions

View File

@@ -49,12 +49,13 @@ class L2Cache(RubyCache):
latency = 15
size = 1048576
def create_system(options, physmem):
def create_system(options, phys_mem, piobus, dma_devices):
if buildEnv['PROTOCOL'] != 'MOESI_hammer':
panic("This script requires the MOESI_hammer protocol to be built.")
sequencers = []
cpu_sequencers = []
#
# The ruby network creation expects the list of nodes in the system to be
# consistent with the NetDest list. Therefore the l1 controller nodes must be
@@ -68,11 +69,10 @@ def create_system(options, physmem):
# Must create the individual controllers before the network to ensure the
# controller constructors are called before the network constructor
#
for i in range(options.num_cpus):
for i in xrange(options.num_cpus):
#
# First create the Ruby objects associated with this cpu
# Eventually this code should go in a python file specific to the
# MOESI_hammer protocol
#
l1i_profiler = CacheProfiler(description = ("l1i_%s_profiler" % i))
l1i_cache = L1Cache(cache_profiler = l1i_profiler)
@@ -85,33 +85,51 @@ def create_system(options, physmem):
cpu_seq = RubySequencer(icache = l1i_cache,
dcache = l1d_cache,
funcmem_port = physmem.port)
physMemPort = phys_mem.port,
physmem = phys_mem)
if piobus != None:
cpu_seq.pio_port = piobus.port
l1_cntrl = L1Cache_Controller(version = i,
sequencer = cpu_seq,
L1IcacheMemory = l1i_cache,
L1DcacheMemory = l1d_cache,
L2cacheMemory = l2_cache)
#
# Add controllers and sequencers to the appropriate lists
#
cpu_sequencers.append(cpu_seq)
l1_cntrl_nodes.append(l1_cntrl)
for i in xrange(options.num_dirs):
#
# Create the Ruby objects associated with the directory controller
#
mem_cntrl = RubyMemoryControl(version = i)
dir_cntrl = Directory_Controller(version = i,
directory = RubyDirectoryMemory(),
directory = \
RubyDirectoryMemory(version = i),
memBuffer = mem_cntrl)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = DMASequencer())
#
# Add controllers and sequencers to the appropriate lists
# As noted above: Independent list are track to maintain the order of
# nodes/controllers assumed by the ruby network
#
sequencers.append(cpu_seq)
l1_cntrl_nodes.append(l1_cntrl)
dir_cntrl_nodes.append(dir_cntrl)
for i, dma_device in enumerate(dma_devices):
#
# Create the Ruby objects associated with the dma controller
#
dma_seq = DMASequencer(version = i,
physMemPort = phys_mem.port,
physmem = phys_mem)
dma_cntrl = DMA_Controller(version = i,
dma_sequencer = dma_seq)
dma_cntrl.dma_sequencer.port = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl)
all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes
return (sequencers, dir_cntrl_nodes, all_cntrls)
return (cpu_sequencers, dir_cntrl_nodes, all_cntrls)

View File

@@ -34,13 +34,16 @@ from m5.util import addToPath
import MOESI_hammer
def create_system(options, physmem):
def create_system(options, physmem, piobus = None, dma_devices = []):
protocol = buildEnv['PROTOCOL']
if protocol == "MOESI_hammer":
(sequencers, dir_cntrls, all_cntrls) = MOESI_hammer.create_system( \
options, physmem)
(cpu_sequencers, dir_cntrls, all_cntrls) = \
MOESI_hammer.create_system(options, \
physmem, \
piobus, \
dma_devices)
else:
print "Error: unsupported ruby protocol"
sys.exit(1)
@@ -68,7 +71,7 @@ def create_system(options, physmem):
ranks_per_dimm = ranksPerDimm,
dimms_per_channel = dimmsPerChannel)
ruby = RubySystem(clock = '1GHz',
ruby = RubySystem(clock = options.clock,
network = network,
profiler = ruby_profiler,
tracer = RubyTracer(),
@@ -77,6 +80,6 @@ def create_system(options, physmem):
protocol_trace = False),
mem_size_mb = mem_size_mb)
ruby.cpu_ruby_ports = sequencers
ruby.cpu_ruby_ports = cpu_sequencers
return ruby