mem: Minimize the use of MemObject.

MemObject doesn't provide anything beyond its base ClockedObject any
more, so this change removes it from most inheritance hierarchies.
Occasionally MemObject is replaced with SimObject when I was fairly
confident that the extra functionality of ClockedObject wasn't needed.

Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
This commit is contained in:
Gabe Black
2019-04-22 19:45:10 -07:00
parent 3cfff8574a
commit cdcc55a6a8
105 changed files with 231 additions and 246 deletions

View File

@@ -43,9 +43,9 @@ from m5.params import *
from m5.proxy import *
from m5.util.fdthelper import *
from m5.objects.MemObject import MemObject
from m5.objects.ClockedObject import ClockedObject
class PioDevice(MemObject):
class PioDevice(ClockedObject):
type = 'PioDevice'
cxx_header = "dev/io_device.hh"
abstract = True

View File

@@ -51,9 +51,10 @@
#include "debug/DMA.hh"
#include "debug/Drain.hh"
#include "mem/port_proxy.hh"
#include "sim/clocked_object.hh"
#include "sim/system.hh"
DmaPort::DmaPort(MemObject *dev, System *s)
DmaPort::DmaPort(ClockedObject *dev, System *s)
: MasterPort(dev->name() + ".dma", dev),
device(dev), sys(s), masterId(s->getMasterId(dev)),
sendEvent([this]{ sendDma(); }, dev->name()),

View File

@@ -54,6 +54,8 @@
#include "sim/drain.hh"
#include "sim/system.hh"
class ClockedObject;
class DmaPort : public MasterPort, public Drainable
{
private:
@@ -109,7 +111,7 @@ class DmaPort : public MasterPort, public Drainable
public:
/** The device that owns this port. */
MemObject *const device;
ClockedObject *const device;
/** The system that device/port are in. This is used to select which mode
* we are currently operating in. */
@@ -141,7 +143,7 @@ class DmaPort : public MasterPort, public Drainable
public:
DmaPort(MemObject *dev, System *s);
DmaPort(ClockedObject *dev, System *s);
RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
uint8_t *data, Tick delay, Request::Flags flag = 0);

View File

@@ -72,7 +72,7 @@ PioPort::getAddrRanges() const
}
PioDevice::PioDevice(const Params *p)
: MemObject(p), sys(p->system), pioPort(this)
: ClockedObject(p), sys(p->system), pioPort(this)
{}
PioDevice::~PioDevice()
@@ -93,7 +93,7 @@ PioDevice::getPort(const std::string &if_name, PortID idx)
if (if_name == "pio") {
return pioPort;
}
return MemObject::getPort(if_name, idx);
return ClockedObject::getPort(if_name, idx);
}
BasicPioDevice::BasicPioDevice(const Params *p, Addr size)

View File

@@ -44,10 +44,10 @@
#ifndef __DEV_IO_DEVICE_HH__
#define __DEV_IO_DEVICE_HH__
#include "mem/mem_object.hh"
#include "mem/tport.hh"
#include "params/BasicPioDevice.hh"
#include "params/PioDevice.hh"
#include "sim/clocked_object.hh"
class PioDevice;
class System;
@@ -81,7 +81,7 @@ class PioPort : public SimpleTimingPort
* mode we are in, etc is handled by the PioPort so the device doesn't have to
* bother.
*/
class PioDevice : public MemObject
class PioDevice : public ClockedObject
{
protected:
System *sys;

View File

@@ -49,7 +49,6 @@
#include "arch/x86/intmessage.hh"
#include "arch/x86/x86_traits.hh"
#include "mem/mem_object.hh"
#include "mem/mport.hh"
#include "params/X86IntLine.hh"
#include "params/X86IntSinkPin.hh"
@@ -68,7 +67,7 @@ class IntDevice
IntDevice * device;
public:
IntSlavePort(const std::string& _name, MemObject* _parent,
IntSlavePort(const std::string& _name, SimObject* _parent,
IntDevice* dev) :
MessageSlavePort(_name, _parent), device(dev)
{
@@ -92,7 +91,7 @@ class IntDevice
IntDevice* device;
Tick latency;
public:
IntMasterPort(const std::string& _name, MemObject* _parent,
IntMasterPort(const std::string& _name, SimObject* _parent,
IntDevice* dev, Tick _latency) :
MessageMasterPort(_name, _parent), device(dev), latency(_latency)
{
@@ -112,7 +111,7 @@ class IntDevice
IntMasterPort intMasterPort;
public:
IntDevice(MemObject * parent, Tick latency = 0) :
IntDevice(SimObject * parent, Tick latency = 0) :
intMasterPort(parent->name() + ".int_master", parent, this, latency)
{
}