mem: Minimize the use of MemObject.
MemObject doesn't provide anything beyond its base ClockedObject any more, so this change removes it from most inheritance hierarchies. Occasionally MemObject is replaced with SimObject when I was fairly confident that the extra functionality of ClockedObject wasn't needed. Change-Id: Ic014ab61e56402e62548e8c831eb16e26523fdce Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18289 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
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@@ -43,9 +43,9 @@ from m5.params import *
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from m5.proxy import *
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from m5.util.fdthelper import *
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from m5.objects.MemObject import MemObject
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from m5.objects.ClockedObject import ClockedObject
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class PioDevice(MemObject):
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class PioDevice(ClockedObject):
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type = 'PioDevice'
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cxx_header = "dev/io_device.hh"
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abstract = True
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@@ -51,9 +51,10 @@
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#include "debug/DMA.hh"
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#include "debug/Drain.hh"
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#include "mem/port_proxy.hh"
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#include "sim/clocked_object.hh"
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#include "sim/system.hh"
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DmaPort::DmaPort(MemObject *dev, System *s)
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DmaPort::DmaPort(ClockedObject *dev, System *s)
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: MasterPort(dev->name() + ".dma", dev),
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device(dev), sys(s), masterId(s->getMasterId(dev)),
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sendEvent([this]{ sendDma(); }, dev->name()),
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@@ -54,6 +54,8 @@
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#include "sim/drain.hh"
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#include "sim/system.hh"
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class ClockedObject;
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class DmaPort : public MasterPort, public Drainable
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{
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private:
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@@ -109,7 +111,7 @@ class DmaPort : public MasterPort, public Drainable
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public:
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/** The device that owns this port. */
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MemObject *const device;
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ClockedObject *const device;
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/** The system that device/port are in. This is used to select which mode
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* we are currently operating in. */
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@@ -141,7 +143,7 @@ class DmaPort : public MasterPort, public Drainable
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public:
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DmaPort(MemObject *dev, System *s);
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DmaPort(ClockedObject *dev, System *s);
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RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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uint8_t *data, Tick delay, Request::Flags flag = 0);
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@@ -72,7 +72,7 @@ PioPort::getAddrRanges() const
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}
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PioDevice::PioDevice(const Params *p)
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: MemObject(p), sys(p->system), pioPort(this)
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: ClockedObject(p), sys(p->system), pioPort(this)
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{}
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PioDevice::~PioDevice()
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@@ -93,7 +93,7 @@ PioDevice::getPort(const std::string &if_name, PortID idx)
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if (if_name == "pio") {
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return pioPort;
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}
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return MemObject::getPort(if_name, idx);
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return ClockedObject::getPort(if_name, idx);
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}
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BasicPioDevice::BasicPioDevice(const Params *p, Addr size)
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@@ -44,10 +44,10 @@
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#ifndef __DEV_IO_DEVICE_HH__
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#define __DEV_IO_DEVICE_HH__
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#include "mem/mem_object.hh"
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#include "mem/tport.hh"
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#include "params/BasicPioDevice.hh"
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#include "params/PioDevice.hh"
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#include "sim/clocked_object.hh"
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class PioDevice;
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class System;
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@@ -81,7 +81,7 @@ class PioPort : public SimpleTimingPort
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* mode we are in, etc is handled by the PioPort so the device doesn't have to
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* bother.
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*/
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class PioDevice : public MemObject
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class PioDevice : public ClockedObject
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{
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protected:
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System *sys;
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@@ -49,7 +49,6 @@
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#include "arch/x86/intmessage.hh"
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#include "arch/x86/x86_traits.hh"
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#include "mem/mem_object.hh"
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#include "mem/mport.hh"
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#include "params/X86IntLine.hh"
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#include "params/X86IntSinkPin.hh"
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@@ -68,7 +67,7 @@ class IntDevice
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IntDevice * device;
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public:
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IntSlavePort(const std::string& _name, MemObject* _parent,
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IntSlavePort(const std::string& _name, SimObject* _parent,
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IntDevice* dev) :
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MessageSlavePort(_name, _parent), device(dev)
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{
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@@ -92,7 +91,7 @@ class IntDevice
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IntDevice* device;
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Tick latency;
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public:
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IntMasterPort(const std::string& _name, MemObject* _parent,
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IntMasterPort(const std::string& _name, SimObject* _parent,
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IntDevice* dev, Tick _latency) :
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MessageMasterPort(_name, _parent), device(dev), latency(_latency)
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{
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@@ -112,7 +111,7 @@ class IntDevice
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IntMasterPort intMasterPort;
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public:
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IntDevice(MemObject * parent, Tick latency = 0) :
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IntDevice(SimObject * parent, Tick latency = 0) :
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intMasterPort(parent->name() + ".int_master", parent, this, latency)
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{
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}
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