diff --git a/src/arch/amdgpu/vega/decoder.cc b/src/arch/amdgpu/vega/decoder.cc
index 291dd6924a..fd3a803bb8 100644
--- a/src/arch/amdgpu/vega/decoder.cc
+++ b/src/arch/amdgpu/vega/decoder.cc
@@ -274,34 +274,34 @@ namespace VegaISA
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
         &Decoder::decode_OP_VOP2__V_SUBREV_U32,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
-        &Decoder::decode_invalid,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_F32_F16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT2C_I32_I16,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT4C_I32_I8,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_DOT8C_I32_I4,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_FMAC_F32,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_PK_FMAC_F16,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
+        &Decoder::decode_OP_VOP2__V_XNOR_B32,
         &Decoder::subDecode_OP_VOPC,
         &Decoder::subDecode_OP_VOPC,
         &Decoder::subDecode_OP_VOPC,
@@ -4171,6 +4171,55 @@ namespace VegaISA
         return new Inst_VOP2__V_SUBREV_U32(&iFmt->iFmt_VOP2);
     }
 
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT2C_F32_F16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT2C_I32_I16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT4C_I32_I8(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_DOT8C_I32_I4(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_FMAC_F32(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_PK_FMAC_F16(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
+    GPUStaticInst*
+    Decoder::decode_OP_VOP2__V_XNOR_B32(MachInst iFmt)
+    {
+        fatal("Trying to decode instruction without a class\n");
+        return nullptr;
+    }
+
     GPUStaticInst*
     Decoder::decode_OP_SOP2__S_ADD_U32(MachInst iFmt)
     {
diff --git a/src/arch/amdgpu/vega/gpu_decoder.hh b/src/arch/amdgpu/vega/gpu_decoder.hh
index 1be43861df..af989e0cc7 100644
--- a/src/arch/amdgpu/vega/gpu_decoder.hh
+++ b/src/arch/amdgpu/vega/gpu_decoder.hh
@@ -1358,6 +1358,13 @@ namespace VegaISA
         GPUStaticInst* decode_OP_VOP2__V_ADD_U32(MachInst);
         GPUStaticInst* decode_OP_VOP2__V_SUB_U32(MachInst);
         GPUStaticInst* decode_OP_VOP2__V_SUBREV_U32(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT2C_F32_F16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT2C_I32_I16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT4C_I32_I8(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_DOT8C_I32_I4(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_FMAC_F32(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_PK_FMAC_F16(MachInst);
+        GPUStaticInst* decode_OP_VOP2__V_XNOR_B32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F32(MachInst);
         GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F64(MachInst);