arm: Use the common pseudoInst dispatch function.

Instead of manually calling each of the PseudoInst implementations, this
function will automatically pick up new instructions and greatly
simplifies the ARM ISA files.

Change-Id: I6cb94b3d115f50d681ca855f80f9d7d3df6bc470
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27791
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-10-22 20:00:38 -07:00
parent 5d47dbff41
commit cb40dd137a
7 changed files with 33 additions and 683 deletions

View File

@@ -119,7 +119,7 @@ format DataOp {
0xa, 0xb: VfpData::vfpData();
} // CPNUM
1: decode CPNUM { // 27-24=1110,4 ==1
0x1: M5ops::m5ops();
0x1: Gem5Op::gem5op();
0xa, 0xb: ShortFpTransfer::shortFpTransfer();
0xe: McrMrc14::mcrMrc14();
0xf: McrMrc15::mcrMrc15();

View File

@@ -82,7 +82,7 @@ decode BIGTHUMB {
default: WarnUnimpl::cdp(); // cdp2
}
0x1: decode LTCOPROC {
0x1: M5ops::m5ops();
0x1: Gem5Op::gem5op();
0xa, 0xb: ShortFpTransfer::shortFpTransfer();
0xe: McrMrc14::mcrMrc14();
0xf: McrMrc15::mcrMrc15();
@@ -147,7 +147,7 @@ decode BIGTHUMB {
default: WarnUnimpl::cdp(); // cdp2
}
0x1: decode LTCOPROC {
0x1: M5ops::m5ops();
0x1: Gem5Op::gem5op();
0xa, 0xb: ShortFpTransfer::shortFpTransfer();
0xe: McrMrc14::mcrMrc14();
0xf: McrMrc15::mcrMrc15();