From cb15939bdf9ded57434bf880a1e0e303eb01df78 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Fri, 3 Feb 2023 15:03:06 +0100 Subject: [PATCH] arch-arm: Replace 0ing of miscRegs with assignment of reset value The reset variable in the MiscRegLUTEntry class defines the per-register reset value. Rather than simply zeroing the misc registers we should assign them their reset value when clearing them. As of now the reset variable is unused so using it is functionally equivalent of calling memset. This will however change once we start using the reset field Signed-off-by: Giacomo Travaglini Change-Id: If352501738729927c1c9b300e5b0b8c27ce41b79 Reviewed-by: Richard Cooper Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70457 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- src/arch/arm/isa.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index aec824387b..5a0dec58f4 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -141,7 +141,9 @@ ISA::clear() } SCTLR sctlr_rst = miscRegs[MISCREG_SCTLR_RST]; - memset(miscRegs, 0, sizeof(miscRegs)); + for (auto idx = 0; idx < NUM_MISCREGS; idx++) { + miscRegs[idx] = lookUpMiscReg[idx].reset(); + } initID32(p);