cpu: Fix LLSC atomic CPU wakeup
Writes to locked memory addresses (LLSC) did not wake up the locking CPU. This can lead to deadlocks on multi-core runs. In AtomicSimpleCPU, recvAtomicSnoop was checking if the incoming packet was an invalidation (isInvalidate) and only then handled a locked snoop. But, writes are seen instead of invalidates when running without caches (fast-forward configurations). As as simple fix, now handleLockedSnoop is also called even if the incoming snoop packet are from writes.
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@@ -104,7 +104,6 @@ clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=false
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max_miss_count=0
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@@ -146,7 +145,6 @@ clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=true
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max_miss_count=0
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@@ -234,7 +232,6 @@ clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=false
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max_miss_count=0
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@@ -276,7 +273,6 @@ clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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is_read_only=true
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max_miss_count=0
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@@ -410,7 +406,6 @@ clk_domain=system.clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=false
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hit_latency=50
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is_read_only=false
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max_miss_count=0
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@@ -447,7 +442,6 @@ clk_domain=system.cpu_clk_domain
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clusivity=mostly_incl
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=20
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is_read_only=false
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max_miss_count=0
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@@ -482,6 +476,7 @@ clk_domain=system.clk_domain
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eventq_index=0
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forward_latency=4
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frontend_latency=3
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point_of_coherency=true
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response_latency=2
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snoop_filter=Null
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snoop_response_latency=4
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@@ -615,6 +610,7 @@ clk_domain=system.cpu_clk_domain
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eventq_index=0
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forward_latency=0
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frontend_latency=1
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point_of_coherency=false
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response_latency=1
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snoop_filter=system.toL2Bus.snoop_filter
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snoop_response_latency=1
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@@ -1,9 +1,9 @@
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Jan 21 2016 13:49:21
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gem5 started Jan 21 2016 13:50:00
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gem5 executing on zizzer, pid 33973
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gem5 compiled Feb 29 2016 18:59:12
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gem5 started Feb 29 2016 18:59:20
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gem5 executing on redacted.arm.com, pid 18325
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re /z/atgutier/gem5/gem5-commit/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
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Global frequency set at 1000000000000 ticks per second
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@@ -11,4 +11,4 @@ info: kernel located at: /dist/m5/system/binaries/vmlinux
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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info: Entering event queue @ 0. Starting simulation...
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info: Launching CPU 1 @ 881785000
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Exiting @ tick 1982594146000 because m5_exit instruction encountered
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Exiting @ tick 1982592736000 because m5_exit instruction encountered
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