diff --git a/src/arch/isa_parser/util.py b/src/arch/isa_parser/util.py
index 9e330adc1f..ee1758d263 100755
--- a/src/arch/isa_parser/util.py
+++ b/src/arch/isa_parser/util.py
@@ -69,7 +69,9 @@ commentRE = re.compile(
 # destination.  basically we're looking for an '=' that's not '=='.
 # The heinous tangle before that handles the case where the operand
 # has an array subscript.
-assignRE = re.compile(r"(\[[^\]]+\])?\s*=(?!=)", re.MULTILINE)
+assignRE = re.compile(
+    r"((\.as<[^>]+>\(\s*\))?\[[^\]]+\])?\s*=(?!=)", re.MULTILINE
+)
 
 #
 # Munge a somewhat arbitrarily formatted piece of Python code
diff --git a/src/arch/riscv/isa/templates/vector_mem.isa b/src/arch/riscv/isa/templates/vector_mem.isa
index c405304a4f..1510c106c7 100644
--- a/src/arch/riscv/isa/templates/vector_mem.isa
+++ b/src/arch/riscv/isa/templates/vector_mem.isa
@@ -1586,7 +1586,7 @@ Fault
     }
     if (machInst.vill)
         return std::make_shared<IllegalInstFault>("VILL is set", machInst);
-    %(op_src_decl)s;
+    %(op_decl)s;
     %(op_rd)s;
     %(set_vlenb)s;
     %(ea_code)s;