derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Enhancements to python config proxy class.

Browse Source 
python/m5/config.py:
    - Enhanced Proxy class now supports subscripting, e.g.,
    parent.cpu[0] or even parent.cpu[0].icache.

    - Proxy also supports multiplication (e.g., parent.cycle * 3),
    though this feature has not been tested.

    - Subscript 0 works even on non-lists, so you can safely say
    cpu[0] and get the first cpu even if there's only one.

    - Changed name of proxy object from 'Super' to 'parent', and
    changed "wild card" notation from plain 'Super' to 'parent.any'.
python/m5/objects/AlphaConsole.mpy:
python/m5/objects/BaseCPU.mpy:
python/m5/objects/BaseSystem.mpy:
python/m5/objects/Device.mpy:
python/m5/objects/Ethernet.mpy:
python/m5/objects/Ide.mpy:
python/m5/objects/IntrControl.mpy:
python/m5/objects/Pci.mpy:
python/m5/objects/PhysicalMemory.mpy:
python/m5/objects/Platform.mpy:
python/m5/objects/SimConsole.mpy:
python/m5/objects/SimpleDisk.mpy:
python/m5/objects/Tsunami.mpy:
python/m5/objects/Uart.mpy:
    Change 'Super.foo' to 'parent.foo' (and 'Super' to 'parent.any').

--HG--
extra : convert_revision : f996d0a3366d5e3e60ae5973691148c3d7cd497d
This commit is contained in:
Steve Reinhardt
2005-03-16 00:40:48 -05:00
parent 42753edb3c
commit c8538d6a7e
15 changed files with 118 additions and 63 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
python/m5/objects/BaseSystem.mpy
View File

@@ -1,8 +1,8 @@
simobj BaseSystem(SimObject):
type = 'BaseSystem'
abstract = True
memctrl = Param.MemoryController(Super, "memory controller")
physmem = Param.PhysicalMemory(Super, "phsyical memory")
memctrl = Param.MemoryController(parent.any, "memory controller")
physmem = Param.PhysicalMemory(parent.any, "phsyical memory")
kernel = Param.String("file that contains the kernel code")
console = Param.String("file that contains the console code")
pal = Param.String("file that contains palcode")