arch-arm,cpu: Add initial support for Arm SVE

This changeset adds initial support for the Arm Scalable Vector Extension
(SVE) by implementing:
- support for most data-processing instructions (no loads/stores yet);
- basic system-level support.

Additional authors:
- Javier Setoain <javier.setoain@arm.com>
- Gabor Dozsa <gabor.dozsa@arm.com>
- Giacomo Travaglini <giacomo.travaglini@arm.com>

Thanks to Pau Cabre for his contribution of bugfixes.

Change-Id: I1808b5ff55b401777eeb9b99c9a1129e0d527709
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/13515
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
This commit is contained in:
Giacomo Gabrielli
2018-10-16 16:09:02 +01:00
parent 91195ae7f6
commit c4cc3145cd
46 changed files with 11605 additions and 61 deletions

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2010 ARM Limited
# Copyright (c) 2010, 2017 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -86,6 +86,7 @@ class SIMD_Unit(FUDesc):
OpDesc(opClass='SimdMultAcc'),
OpDesc(opClass='SimdShift'),
OpDesc(opClass='SimdShiftAcc'),
OpDesc(opClass='SimdDiv'),
OpDesc(opClass='SimdSqrt'),
OpDesc(opClass='SimdFloatAdd'),
OpDesc(opClass='SimdFloatAlu'),
@@ -95,9 +96,18 @@ class SIMD_Unit(FUDesc):
OpDesc(opClass='SimdFloatMisc'),
OpDesc(opClass='SimdFloatMult'),
OpDesc(opClass='SimdFloatMultAcc'),
OpDesc(opClass='SimdFloatSqrt') ]
OpDesc(opClass='SimdFloatSqrt'),
OpDesc(opClass='SimdReduceAdd'),
OpDesc(opClass='SimdReduceAlu'),
OpDesc(opClass='SimdReduceCmp'),
OpDesc(opClass='SimdFloatReduceAdd'),
OpDesc(opClass='SimdFloatReduceCmp') ]
count = 4
class PredALU(FUDesc):
opList = [ OpDesc(opClass='SimdPredAlu') ]
count = 1
class ReadPort(FUDesc):
opList = [ OpDesc(opClass='MemRead'),
OpDesc(opClass='FloatMemRead') ]