From c4852b35dde2df1d2bb16dc364a9042d61630884 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 28 Aug 2021 16:30:47 -0700 Subject: [PATCH] arch-arm: Remove pointless makeSPs and makeZeros around fixed idxs. In a few places, the makeSP helper function was being called on a fixed register index, INTREG_SPX. That method would always return INTREG_SPX, so this call was pointless. Similarly, there were calls to makeZero on the fixed index INTREG_X31 which would return INTREG_ZERO. It's not clear what the intention of this code was, so this change simply removes the pointless calls, and makes it clearer what value is actually being used by the instructions. Change-Id: I604f013430f180566e1cc44939b145bc5f45f637 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49763 Tested-by: kokoro Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini --- src/arch/arm/insts/branch64.hh | 5 ++--- src/arch/arm/isa/formats/aarch64.isa | 32 ++++++++++++++-------------- 2 files changed, 18 insertions(+), 19 deletions(-) diff --git a/src/arch/arm/insts/branch64.hh b/src/arch/arm/insts/branch64.hh index 6af5ffcae2..10483a6516 100644 --- a/src/arch/arm/insts/branch64.hh +++ b/src/arch/arm/insts/branch64.hh @@ -134,8 +134,7 @@ class BranchRetA64 : public BranchRegReg64 { public: BranchRetA64(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - BranchRegReg64(mnem, _machInst, __opClass, INTREG_X30, - makeSP(INTREG_SPX)) + BranchRegReg64(mnem, _machInst, __opClass, INTREG_X30, INTREG_SPX) {} std::string generateDisassembly( @@ -162,7 +161,7 @@ class BranchEretA64 : public ArmStaticInst public: BranchEretA64(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - ArmStaticInst(mnem, _machInst, __opClass), op1(makeSP(INTREG_SPX)) + ArmStaticInst(mnem, _machInst, __opClass), op1(INTREG_SPX) {} std::string generateDisassembly( diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index afe0b9de11..a508b30c88 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -362,28 +362,28 @@ namespace Aarch64 switch (op2) { case 0x0: return new Paciaz(machInst, - INTREG_X30, makeZero(INTREG_X31)); + INTREG_X30, INTREG_ZERO); case 0x1: return new Paciasp(machInst, - INTREG_X30, makeSP(INTREG_SPX)); + INTREG_X30, INTREG_SPX); case 0x2: return new Pacibz(machInst, - INTREG_X30, makeZero(INTREG_X31)); + INTREG_X30, INTREG_ZERO); case 0x3: return new Pacibsp(machInst, - INTREG_X30, makeSP(INTREG_SPX)); + INTREG_X30, INTREG_SPX); case 0x4: return new Autiaz(machInst, - INTREG_X30, makeZero(INTREG_X31)); + INTREG_X30, INTREG_ZERO); case 0x5: return new Autiasp(machInst, - INTREG_X30, makeSP(INTREG_SPX)); + INTREG_X30, INTREG_SPX); case 0x6: return new Autibz(machInst, - INTREG_X30, makeZero(INTREG_X31)); + INTREG_X30, INTREG_ZERO); case 0x7: return new Autibsp(machInst, - INTREG_X30, makeSP(INTREG_SPX)); + INTREG_X30, INTREG_SPX); } break; case 0x4: @@ -2159,49 +2159,49 @@ namespace Aarch64 case 0x8: if (rn == 0x1f) return new Paciza(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0x9: if (rn == 0x1f) return new Pacizb(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xa: if (rn == 0x1f) return new Pacdza(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xb: if (rn == 0x1f) return new Pacdzb(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xc: if (rn == 0x1f) return new Autiza(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xd: if (rn == 0x1f) return new Autizb(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xe: if (rn == 0x1f) return new Autdza(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); case 0xf: if (rn == 0x1f) return new Autdzb(machInst, rd, - makeZero(INTREG_X31)); + INTREG_ZERO); else return new Unknown64(machInst); default: