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Merge with the main repo.

Browse Source 
--HG--
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
This commit is contained in:
Gabe Black
2012-01-28 07:24:01 -08:00
parent da2a4acc26 4acca8a053
commit c3d41a2def
717 changed files with 16788 additions and 13793 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/dev/Device.py
View File

@@ -45,7 +45,7 @@ class BasicPioDevice(PioDevice):
class DmaDevice(PioDevice):
type = 'DmaDevice'
abstract = True
dma = Port(Self.pio.peerObj.port, "DMA port")
dma = Port("DMA port")
min_backoff_delay = Param.Latency('4ns',
"min time between a nack packet being received and the next request made by the device")
max_backoff_delay = Param.Latency('10us',

2
src/dev/Pci.py
View File

@@ -43,7 +43,7 @@ class PciDevice(DmaDevice):
type = 'PciDevice'
abstract = True
platform = Param.Platform(Parent.any, "Platform this device is part of.")
config = Port(Self.pio.peerObj.port, "PCI configuration space port")
config = Port("PCI configuration space port")
pci_bus = Param.Int("PCI bus")
pci_dev = Param.Int("PCI device number")
pci_func = Param.Int("PCI function code")

42
src/dev/arm/RealView.py
View File

@@ -1,4 +1,4 @@
# Copyright (c) 2009 ARM Limited
# Copyright (c) 2009-2011 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -178,12 +178,18 @@ class RealViewPBX(RealView):
rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
# Attach I/O devices that are on chip
def attachOnChipIO(self, bus):
# Attach I/O devices that are on chip and also set the appropriate
# ranges for the bridge
def attachOnChipIO(self, bus, bridge):
self.gic.pio = bus.port
self.l2x0_fake.pio = bus.port
self.a9scu.pio = bus.port
self.local_cpu_timer.pio = bus.port
# Bridge ranges based on excluding what is part of on-chip I/O
# (gic, l2x0, a9scu, local_cpu_timer)
bridge.ranges = [AddrRange(self.realview_io.pio_addr,
self.a9scu.pio_addr - 1),
AddrRange(self.flash_fake.pio_addr, Addr.max)]
# Attach I/O devices to specified bus object. Can't do this
# earlier, since the bus object itself is typically defined at the
@@ -194,9 +200,12 @@ class RealViewPBX(RealView):
self.timer0.pio = bus.port
self.timer1.pio = bus.port
self.clcd.pio = bus.port
self.clcd.dma = bus.port
self.kmi0.pio = bus.port
self.kmi1.pio = bus.port
self.cf_ctrl.pio = bus.port
self.cf_ctrl.config = bus.port
self.cf_ctrl.dma = bus.port
self.dmac_fake.pio = bus.port
self.uart1_fake.pio = bus.port
self.uart2_fake.pio = bus.port
@@ -249,10 +258,16 @@ class RealViewEB(RealView):
# Attach I/O devices that are on chip
def attachOnChipIO(self, bus):
# Attach I/O devices that are on chip and also set the appropriate
# ranges for the bridge
def attachOnChipIO(self, bus, bridge):
self.gic.pio = bus.port
self.l2x0_fake.pio = bus.port
# Bridge ranges based on excluding what is part of on-chip I/O
# (gic, l2x0)
bridge.ranges = [AddrRange(self.realview_io.pio_addr,
self.gic.cpu_addr - 1),
AddrRange(self.flash_fake.pio_addr, Addr.max)]
# Attach I/O devices to specified bus object. Can't do this
# earlier, since the bus object itself is typically defined at the
@@ -263,6 +278,7 @@ class RealViewEB(RealView):
self.timer0.pio = bus.port
self.timer1.pio = bus.port
self.clcd.pio = bus.port
self.clcd.dma = bus.port
self.kmi0.pio = bus.port
self.kmi1.pio = bus.port
self.dmac_fake.pio = bus.port
@@ -330,10 +346,15 @@ class VExpress_ELT(RealView):
usb_fake = IsaFake(pio_addr=0xFB000000, pio_size=0x1ffff)
# Attach I/O devices that are on chip
def attachOnChipIO(self, bus):
# Attach I/O devices that are on chip and also set the appropriate
# ranges for the bridge
def attachOnChipIO(self, bus, bridge):
self.gic.pio = bus.port
self.a9scu.pio = bus.port
# Bridge ranges based on excluding what is part of on-chip I/O
# (gic, a9scu)
bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]
# Attach I/O devices to specified bus object. Can't do this
# earlier, since the bus object itself is typically defined at the
@@ -348,13 +369,20 @@ class VExpress_ELT(RealView):
self.elba_timer0.pio = bus.port
self.elba_timer1.pio = bus.port
self.clcd.pio = bus.port
self.clcd.dma = bus.port
self.kmi0.pio = bus.port
self.kmi1.pio = bus.port
self.elba_kmi0.pio = bus.port
self.elba_kmi1.pio = bus.port
self.cf_ctrl.pio = bus.port
self.cf_ctrl.config = bus.port
self.cf_ctrl.dma = bus.port
self.ide.pio = bus.port
self.ide.config = bus.port
self.ide.dma = bus.port
self.ethernet.pio = bus.port
self.ethernet.config = bus.port
self.ethernet.dma = bus.port
self.pciconfig.pio = bus.default
bus.use_default_range = True

11
src/dev/arm/gic.cc
View File

@@ -705,12 +705,13 @@ Gic::postInt(uint32_t cpu, Tick when)
eventq->schedule(postIntEvent[cpu], when);
}
void
Gic::addressRanges(AddrRangeList &range_list)
AddrRangeList
Gic::getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeSize(distAddr, DIST_SIZE));
range_list.push_back(RangeSize(cpuAddr, CPU_SIZE));
AddrRangeList ranges;
ranges.push_back(RangeSize(distAddr, DIST_SIZE));
ranges.push_back(RangeSize(cpuAddr, CPU_SIZE));
return ranges;
}

2
src/dev/arm/gic.hh
View File

@@ -261,7 +261,7 @@ class Gic : public PioDevice
/** Return the address ranges used by the Gic
* This is the distributor address + all cpu addresses
*/
virtual void addressRanges(AddrRangeList &range_list);
virtual AddrRangeList getAddrRanges();
/** A PIO read to the device, immediately split up into
* readDistributor() or readCpu()

9
src/dev/arm/pl111.cc
View File

@@ -735,11 +735,12 @@ Pl111::generateInterrupt()
}
}
void
Pl111::addressRanges(AddrRangeList& range_list)
AddrRangeList
Pl111::getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeSize(pioAddr, pioSize));
AddrRangeList ranges;
ranges.push_back(RangeSize(pioAddr, pioSize));
return ranges;
}
Pl111 *

8
src/dev/arm/pl111.hh
View File

@@ -325,10 +325,12 @@ class Pl111: public AmbaDmaDevice
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);
/** return the address ranges that this device responds to.
* @param range_list range list to populate with ranges
/**
* Determine the address ranges that this device responds to.
*
* @return a list of non-overlapping address ranges
*/
void addressRanges(AddrRangeList &range_list);
AddrRangeList getAddrRanges();
};
#endif

1
src/dev/copy_engine.hh
View File

@@ -85,7 +85,6 @@ class CopyEngine : public PciDev
void init();
std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); }
virtual void addressRanges(AddrRangeList &range_list) { range_list.clear(); }
virtual Tick read(PacketPtr pkt)
{ panic("CopyEngineChannel has no I/O access\n");}
virtual Tick write(PacketPtr pkt)

34
src/dev/io_device.cc
View File

@@ -47,13 +47,10 @@ PioPort::recvAtomic(PacketPtr pkt)
return pkt->isRead() ? device->read(pkt) : device->write(pkt);
}
void
PioPort::getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
AddrRangeList
PioPort::getAddrRanges()
{
snoop = false;
device->addressRanges(resp);
for (AddrRangeIter i = resp.begin(); i != resp.end(); i++)
DPRINTF(BusAddrRanges, "Adding Range %#x-%#x\n", i->start, i->end);
return device->getAddrRanges();
}
@@ -72,7 +69,7 @@ PioDevice::init()
{
if (!pioPort)
panic("Pio port of %s not connected to anything!", name());
pioPort->sendStatusChange(Port::RangeChange);
pioPort->sendRangeChange();
}
Port *
@@ -105,13 +102,14 @@ BasicPioDevice::BasicPioDevice(const Params *p)
pioDelay(p->pio_latency)
{}
void
BasicPioDevice::addressRanges(AddrRangeList &range_list)
AddrRangeList
BasicPioDevice::getAddrRanges()
{
assert(pioSize != 0);
range_list.clear();
AddrRangeList ranges;
DPRINTF(BusAddrRanges, "registering range: %#x-%#x\n", pioAddr, pioSize);
range_list.push_back(RangeSize(pioAddr, pioSize));
ranges.push_back(RangeSize(pioAddr, pioSize));
return ranges;
}
@@ -121,7 +119,7 @@ DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff,
pendingCount(0), actionInProgress(0), drainEvent(NULL),
backoffTime(0), minBackoffDelay(min_backoff),
maxBackoffDelay(max_backoff), inRetry(false), recvSnoops(recv_snoops),
snoopRangeSent(false), backoffEvent(this)
backoffEvent(this)
{ }
bool
@@ -136,7 +134,7 @@ DmaPort::recvTiming(PacketPtr pkt)
else if (backoffTime < maxBackoffDelay)
backoffTime <<= 1;
reschedule(backoffEvent, curTick() + backoffTime, true);
device->reschedule(backoffEvent, curTick() + backoffTime, true);
DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
@@ -164,7 +162,8 @@ DmaPort::recvTiming(PacketPtr pkt)
if (state->totBytes == state->numBytes) {
if (state->completionEvent) {
if (state->delay)
schedule(state->completionEvent, curTick() + state->delay);
device->schedule(state->completionEvent,
curTick() + state->delay);
else
state->completionEvent->process();
}
@@ -234,7 +233,7 @@ DmaPort::recvRetry()
if (transmitList.size() && backoffTime && !inRetry) {
DPRINTF(DMA, "Scheduling backoff for %d\n", curTick()+backoffTime);
if (!backoffEvent.scheduled())
schedule(backoffEvent, backoffTime + curTick());
device->schedule(backoffEvent, backoffTime + curTick());
}
DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
transmitList.size(), backoffTime, inRetry,
@@ -320,7 +319,7 @@ DmaPort::sendDma()
!backoffEvent.scheduled()) {
DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
backoffTime+curTick());
schedule(backoffEvent, backoffTime + curTick());
device->schedule(backoffEvent, backoffTime + curTick());
}
} else if (state == Enums::atomic) {
transmitList.pop_front();
@@ -342,7 +341,8 @@ DmaPort::sendDma()
if (state->totBytes == state->numBytes) {
if (state->completionEvent) {
assert(!state->completionEvent->scheduled());
schedule(state->completionEvent, curTick() + lat + state->delay);
device->schedule(state->completionEvent,
curTick() + lat + state->delay);
}
delete state;
delete pkt->req;

45
src/dev/io_device.hh
View File

@@ -50,7 +50,7 @@ class System;
* The PioPort class is a programmed i/o port that all devices that are
* sensitive to an address range use. The port takes all the memory
* access types and roles them into one read() and write() call that the device
* must respond to. The device must also provide the addressRanges() function
* must respond to. The device must also provide getAddrRanges() function
* with which it returns the address ranges it is interested in.
*/
class PioPort : public SimpleTimingPort
@@ -61,8 +61,7 @@ class PioPort : public SimpleTimingPort
virtual Tick recvAtomic(PacketPtr pkt);
virtual void getDeviceAddressRanges(AddrRangeList &resp,
bool &snoop);
virtual AddrRangeList getAddrRanges();
public:
@@ -132,9 +131,6 @@ class DmaPort : public Port
/** Port accesses a cache which requires snooping */
bool recvSnoops;
/** Records snoop response so we only reply once to a status change */
bool snoopRangeSent;
virtual bool recvTiming(PacketPtr pkt);
virtual Tick recvAtomic(PacketPtr pkt)
{
@@ -149,25 +145,16 @@ class DmaPort : public Port
panic("dma port shouldn't be used for pio access.");
}
virtual void recvStatusChange(Status status)
virtual void recvRangeChange()
{
if (recvSnoops) {
if (status == RangeChange) {
if (!snoopRangeSent) {
snoopRangeSent = true;
sendStatusChange(Port::RangeChange);
}
return;
}
panic("Unexpected recvStatusChange\n");
}
// DMA port is a master with a single slave so there is no choice and
// thus no need to worry about any address changes
}
virtual void recvRetry() ;
virtual void getDeviceAddressRanges(AddrRangeList &resp,
bool &snoop)
{ resp.clear(); snoop = recvSnoops; }
virtual bool isSnooping()
{ return recvSnoops; }
void queueDma(PacketPtr pkt, bool front = false);
void sendDma();
@@ -191,7 +178,7 @@ class DmaPort : public Port
/**
* This device is the base class which all devices senstive to an address range
* inherit from. There are three pure virtual functions which all devices must
* implement addressRanges(), read(), and write(). The magic do choose which
* implement getAddrRanges(), read(), and write(). The magic do choose which
* mode we are in, etc is handled by the PioPort so the device doesn't have to
* bother.
*/
@@ -204,7 +191,13 @@ class PioDevice : public MemObject
* that it sees. */
PioPort *pioPort;
virtual void addressRanges(AddrRangeList &range_list) = 0;
/**
* Every PIO device is obliged to provide an implementation that
* returns the address ranges the device responds to.
*
* @return a list of non-overlapping address ranges
*/
virtual AddrRangeList getAddrRanges() = 0;
/** Pure virtual function that the device must implement. Called
* when a read command is recieved by the port.
@@ -263,10 +256,12 @@ class BasicPioDevice : public PioDevice
return dynamic_cast<const Params *>(_params);
}
/** return the address ranges that this device responds to.
* @param range_list range list to populate with ranges
/**
* Determine the address ranges that this device responds to.
*
* @return a list of non-overlapping address ranges
*/
void addressRanges(AddrRangeList &range_list);
virtual AddrRangeList getAddrRanges();
};

20
src/dev/ns_gige.cc
View File

@@ -465,16 +465,16 @@ NSGigE::write(PacketPtr pkt)
reg & CFGR_DUPSTS ||
reg & CFGR_RESERVED ||
reg & CFGR_T64ADDR ||
reg & CFGR_PCI64_DET)
// First clear all writable bits
regs.config &= CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
CFGR_RESERVED | CFGR_T64ADDR |
CFGR_PCI64_DET;
// Now set the appropriate writable bits
regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
CFGR_RESERVED | CFGR_T64ADDR |
CFGR_PCI64_DET);
reg & CFGR_PCI64_DET) {
// First clear all writable bits
regs.config &= CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
CFGR_RESERVED | CFGR_T64ADDR |
CFGR_PCI64_DET;
// Now set the appropriate writable bits
regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
CFGR_RESERVED | CFGR_T64ADDR |
CFGR_PCI64_DET);
}
// all these #if 0's are because i don't THINK the kernel needs to
// have these implemented. if there is a problem relating to one of

9
src/dev/pciconfigall.cc
View File

@@ -86,11 +86,12 @@ PciConfigAll::write(PacketPtr pkt)
}
void
PciConfigAll::addressRanges(AddrRangeList &range_list)
AddrRangeList
PciConfigAll::getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeSize(pioAddr, params()->size));
AddrRangeList ranges;
ranges.push_back(RangeSize(pioAddr, params()->size));
return ranges;
}

2
src/dev/pciconfigall.hh
View File

@@ -80,7 +80,7 @@ class PciConfigAll : public PioDevice
virtual Tick write(PacketPtr pkt);
void addressRanges(AddrRangeList &range_list);
AddrRangeList getAddrRanges();
private:
Addr pioAddr;

29
src/dev/pcidev.cc
View File

@@ -72,13 +72,13 @@ PciDev::PciConfigPort::recvAtomic(PacketPtr pkt)
return pkt->isRead() ? device->readConfig(pkt) : device->writeConfig(pkt);
}
void
PciDev::PciConfigPort::getDeviceAddressRanges(AddrRangeList &resp,
bool &snoop)
AddrRangeList
PciDev::PciConfigPort::getAddrRanges()
{
snoop = false;;
AddrRangeList ranges;
if (configAddr != ULL(-1))
resp.push_back(RangeSize(configAddr, PCI_CONFIG_SIZE+1));
ranges.push_back(RangeSize(configAddr, PCI_CONFIG_SIZE+1));
return ranges;
}
@@ -150,9 +150,9 @@ PciDev::PciDev(const Params *p)
void
PciDev::init()
{
if (!configPort)
panic("pci config port not connected to anything!");
configPort->sendStatusChange(Port::RangeChange);
if (!configPort && !configPort->isConnected())
panic("PCI config port on %s not connected to anything!\n", name());
configPort->sendRangeChange();
PioDevice::init();
}
@@ -207,14 +207,15 @@ PciDev::readConfig(PacketPtr pkt)
}
void
PciDev::addressRanges(AddrRangeList &range_list)
AddrRangeList
PciDev::getAddrRanges()
{
AddrRangeList ranges;
int x = 0;
range_list.clear();
for (x = 0; x < 6; x++)
if (BARAddrs[x] != 0)
range_list.push_back(RangeSize(BARAddrs[x],BARSize[x]));
ranges.push_back(RangeSize(BARAddrs[x],BARSize[x]));
return ranges;
}
Tick
@@ -301,7 +302,7 @@ PciDev::writeConfig(PacketPtr pkt)
BARAddrs[barnum] = BAR_IO_SPACE(he_old_bar) ?
platform->calcPciIOAddr(he_new_bar) :
platform->calcPciMemAddr(he_new_bar);
pioPort->sendStatusChange(Port::RangeChange);
pioPort->sendRangeChange();
}
}
config.baseAddr[barnum] = htole((he_new_bar & ~bar_mask) |
@@ -354,7 +355,7 @@ PciDev::unserialize(Checkpoint *cp, const std::string &section)
UNSERIALIZE_ARRAY(BARAddrs, sizeof(BARAddrs) / sizeof(BARAddrs[0]));
UNSERIALIZE_ARRAY(config.data,
sizeof(config.data) / sizeof(config.data[0]));
pioPort->sendStatusChange(Port::RangeChange);
pioPort->sendRangeChange();
}

11
src/dev/pcidev.hh
View File

@@ -65,8 +65,7 @@ class PciDev : public DmaDevice
virtual Tick recvAtomic(PacketPtr pkt);
virtual void getDeviceAddressRanges(AddrRangeList &resp,
bool &snoop);
virtual AddrRangeList getAddrRanges();
Platform *platform;
@@ -187,10 +186,12 @@ class PciDev : public DmaDevice
interruptLine()
{ return letoh(config.interruptLine); }
/** return the address ranges that this device responds to.
* @params range_list range list to populate with ranges
/**
* Determine the address ranges that this device responds to.
*
* @return a list of non-overlapping address ranges
*/
void addressRanges(AddrRangeList &range_list);
AddrRangeList getAddrRanges();
/**
* Constructor for PCI Dev. This function copies data from the

4
src/dev/simple_disk.cc
View File

@@ -46,7 +46,7 @@
#include "debug/SimpleDiskData.hh"
#include "dev/disk_image.hh"
#include "dev/simple_disk.hh"
#include "mem/port.hh"
#include "mem/port_proxy.hh"
#include "sim/system.hh"
using namespace std;
@@ -70,7 +70,7 @@ SimpleDisk::read(Addr addr, baddr_t block, int count) const
for (int i = 0, j = 0; i < count; i += SectorSize, j++)
image->read(data + i, block + j);
system->functionalPort->writeBlob(addr, data, count);
system->physProxy->writeBlob(addr, data, count);
DPRINTF(SimpleDisk, "read block=%#x len=%d\n", (uint64_t)block, count);
DDUMP(SimpleDiskData, data, count);

2
src/dev/sinic.cc
View File

@@ -1714,7 +1714,7 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
if (transmitTick)
schedule(txEvent, curTick() + transmitTick);
pioPort->sendStatusChange(Port::RangeChange);
pioPort->sendRangeChange();
}

11
src/dev/sparc/iob.cc
View File

@@ -323,12 +323,13 @@ Iob::receiveJBusInterrupt(int cpu_id, int source, uint64_t d0, uint64_t d1)
return true;
}
void
Iob::addressRanges(AddrRangeList &range_list)
AddrRangeList
Iob::getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeSize(iobManAddr, iobManSize));
range_list.push_back(RangeSize(iobJBusAddr, iobJBusSize));
AddrRangeList ranges;
ranges.push_back(RangeSize(iobManAddr, iobManSize));
ranges.push_back(RangeSize(iobJBusAddr, iobJBusSize));
return ranges;
}

2
src/dev/sparc/iob.hh
View File

@@ -141,7 +141,7 @@ class Iob : public PioDevice
bool receiveJBusInterrupt(int cpu_id, int source, uint64_t d0,
uint64_t d1);
void addressRanges(AddrRangeList &range_list);
AddrRangeList getAddrRanges();
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);

12
src/dev/uart8250.cc
View File

@@ -286,16 +286,14 @@ Uart8250::dataAvailable()
}
void
Uart8250::addressRanges(AddrRangeList &range_list)
AddrRangeList
Uart8250::getAddrRanges()
{
assert(pioSize != 0);
range_list.clear();
range_list.push_back(RangeSize(pioAddr, pioSize));
AddrRangeList ranges;
ranges.push_back(RangeSize(pioAddr, pioSize));
return ranges;
}
void
Uart8250::serialize(ostream &os)
{

2
src/dev/uart8250.hh
View File

@@ -100,7 +100,7 @@ class Uart8250 : public Uart
virtual Tick read(PacketPtr pkt);
virtual Tick write(PacketPtr pkt);
virtual void addressRanges(AddrRangeList &range_list);
virtual AddrRangeList getAddrRanges();
/**
* Inform the uart that there is data available.

2
src/dev/x86/SouthBridge.py
View File

@@ -105,6 +105,8 @@ class SouthBridge(SimObject):
self.cmos.pio = bus.port
self.dma1.pio = bus.port
self.ide.pio = bus.port
self.ide.config = bus.port
self.ide.dma = bus.port
self.keyboard.pio = bus.port
self.pic1.pio = bus.port
self.pic2.pio = bus.port

11
src/dev/x86/i8042.cc
View File

@@ -43,12 +43,13 @@ const uint8_t CommandAck = 0xfa;
const uint8_t CommandNack = 0xfe;
const uint8_t BatSuccessful = 0xaa;
void
X86ISA::I8042::addressRanges(AddrRangeList &range_list)
AddrRangeList
X86ISA::I8042::getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeSize(dataPort, 1));
range_list.push_back(RangeSize(commandPort, 1));
AddrRangeList ranges;
ranges.push_back(RangeSize(dataPort, 1));
ranges.push_back(RangeSize(commandPort, 1));
return ranges;
}
void

2
src/dev/x86/i8042.hh
View File

@@ -255,7 +255,7 @@ class I8042 : public BasicPioDevice
commandByte.keyboardFullInt = 1;
}
void addressRanges(AddrRangeList &range_list);
AddrRangeList getAddrRanges();
Tick read(PacketPtr pkt);

20
src/dev/x86/i82094aa.hh
View File

@@ -101,19 +101,21 @@ class I82094AA : public PioDevice, public IntDev
Tick read(PacketPtr pkt);
Tick write(PacketPtr pkt);
void addressRanges(AddrRangeList &range_list)
AddrRangeList getAddrRanges()
{
range_list.clear();
range_list.push_back(RangeEx(pioAddr, pioAddr + 4));
range_list.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
AddrRangeList ranges;
ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
return ranges;
}
void getIntAddrRange(AddrRangeList &range_list)
AddrRangeList getIntAddrRange()
{
range_list.clear();
range_list.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
x86InterruptAddress(initialApicId, 0) +
PhysAddrAPICRangeSize));
AddrRangeList ranges;
ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
x86InterruptAddress(initialApicId, 0) +
PhysAddrAPICRangeSize));
return ranges;
}
void writeReg(uint8_t offset, uint32_t value);

2
src/dev/x86/intdev.cc
View File

@@ -54,7 +54,7 @@ X86ISA::IntDev::init()
if (!intPort) {
panic("Int port not connected to anything!");
}
intPort->sendStatusChange(Port::RangeChange);
intPort->sendRangeChange();
}
X86ISA::IntSourcePin *

9
src/dev/x86/intdev.hh
View File

@@ -63,10 +63,9 @@ class IntDev
{
}
void getDeviceAddressRanges(AddrRangeList &resp, bool &snoop)
AddrRangeList getAddrRanges()
{
snoop = false;
device->getIntAddrRange(resp);
return device->getIntAddrRange();
}
Tick recvMessage(PacketPtr pkt)
@@ -134,8 +133,8 @@ class IntDev
return 0;
}
virtual void
getIntAddrRange(AddrRangeList &range_list)
virtual AddrRangeList
getIntAddrRange()
{
panic("intAddrRange not implemented.\n");
}