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infinitesimal small baby steps toward MIPS actually working

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arch/mips/isa/formats/branch.isa:
    let user know that we alter r31 in disassembly
arch/mips/isa_traits.cc:
    add copyRegs function ...
    comment out serialize float code for now
arch/mips/isa_traits.hh:
    make FloatRegFile a class ... change values of architectural regs
arch/mips/process.cc:
    change MIPS to Mips
base/loader/elf_object.cc:
    get global pointer initialized to a value
base/loader/elf_object.hh:
    Add global_ptr to elf_object constructor
base/loader/object_file.hh:
    MIPS to Mips
base/traceflags.py:
    SimpleCPU trace flag
cpu/simple/cpu.cc:
    DPRINTF flags for SimpleCPU
cpu/static_inst.hh:
    Add Decoder functions to static_inst.hh

--HG--
extra : convert_revision : 0544a8524d3fe4229428cb06822f7da208c72459
This commit is contained in:
Korey Sewell
2006-03-15 16:26:40 -05:00
parent 0d8cfed042
commit c32b4ecac1
10 changed files with 170 additions and 41 deletions
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7
cpu/simple/cpu.cc
View File

@@ -889,6 +889,8 @@ SimpleCPU::post_interrupt(int int_num, int index)
void
SimpleCPU::tick()
{
DPRINTF(SimpleCPU,"\n\n");
numCycles++;
traceData = NULL;
@@ -961,7 +963,7 @@ SimpleCPU::tick()
#define IFETCH_FLAGS(pc) 0
#endif
DPRINTF(Fetch,"Fetching PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
cpuXC->readNextPC(),cpuXC->readNextNPC());
#if SIMPLE_CPU_MEM_TIMING
@@ -1033,6 +1035,9 @@ SimpleCPU::tick()
traceData = Trace::getInstRecord(curTick, xcProxy, this, curStaticInst,
cpuXC->readPC());
DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n",
curStaticInst->getName(),curStaticInst->getOpcode(), curStaticInst->machInst);
#if FULL_SYSTEM
cpuXC->setInst(inst);
#endif // FULL_SYSTEM

11
cpu/static_inst.hh
View File

@@ -391,6 +391,17 @@ class StaticInst : public StaticInstBase
/// @retval A pointer to the corresponding StaticInst object.
//This is defined as inline below.
static StaticInstPtr decode(ExtMachInst mach_inst);
//MIPS Decoder Debug Functions
int getOpcode() { return (machInst & 0xFC000000) >> 26 ; }//31..26
int getRs() { return (machInst & 0x03E00000) >> 21; } //25...21
int getRt() { return (machInst & 0x001F0000) >> 16; } //20...16
int getRd() { return (machInst & 0x0000F800) >> 11; } //15...11
int getOpname(){ return (machInst & 0x0000003F); }//5...0
int getBranch(){ return (machInst & 0x0000FFFF); }//5...0
int getJump(){ return (machInst & 0x03FFFFFF); }//5...0
int getHint(){ return (machInst & 0x000007C0) >> 6; } //10...6
std::string getName() { return mnemonic; }
};
typedef RefCountingPtr<StaticInstBase> StaticInstBasePtr;