config: Support full-system with SST's memory system

This patch adds an example configuration in ext/sst/tests/ that allows
an SST/gem5 instance to simulate a 4-core AArch64 system with SST's
memHierarchy components providing all the caches and memories.
This commit is contained in:
Curtis Dunham
2015-04-08 15:56:06 -05:00
parent f05cb84ed1
commit c3268f8820
7 changed files with 307 additions and 23 deletions

View File

@@ -189,6 +189,14 @@ def config_mem(options, system):
them.
"""
if options.external_memory_system:
system.external_memory = m5.objects.ExternalSlave(
port_type=options.external_memory_system,
port_data="init_mem0", port=system.membus.master,
addr_ranges=system.mem_ranges)
system.kernel_addr_check = False
return
nbr_mem_ctrls = options.mem_channels
import math
from m5.util import fatal