From c2541a817511e8f8d4ec6c1e9806efb7f4bc9569 Mon Sep 17 00:00:00 2001
From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Fri, 21 Oct 2022 16:21:41 +0100
Subject: [PATCH] arch-arm: Use ThreadContext in ArmISA::currEL implementation

This is partly reverting a previous patch [1] which was
moving most functionalities within the ISA class.
This evidently does not work well with thread context implementations
which are bypassed by the ISA objects as noted by [2]

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/53624
[2]: https://gem5-review.googlesource.com/c/public/gem5/+/64653

Change-Id: I0c91c76f690542219ffbbf53359531d9dea9e86d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64914
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
---
 src/arch/arm/utility.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index f5d37fee8d..d7185f2014 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -123,8 +123,8 @@ inAArch64(ThreadContext *tc)
 ExceptionLevel
 currEL(const ThreadContext *tc)
 {
-    return static_cast<ArmISA::ISA *>(
-        const_cast<ThreadContext *>(tc)->getIsaPtr())->currEL();
+    CPSR cpsr = tc->readMiscRegNoEffect(MISCREG_CPSR);
+    return opModeToEL((OperatingMode)(uint8_t)cpsr.mode);
 }
 
 bool