From c142629ccce7c0afef036e2201fdd75dfc07e764 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 3 May 2021 18:03:14 -0700 Subject: [PATCH] arch,cpu: Rename RegClass to RegClassType. This type is really an index which selects a RegClass, not a RegClass itself. A follow on change will rename RegClassInfo to RegClass. Change-Id: I2c1b1d4105bd11b58680053b484d4c1aa1055a9f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45229 Maintainer: Gabe Black Maintainer: Giacomo Travaglini Reviewed-by: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/tracers/tarmac_record.hh | 2 +- src/cpu/o3/regfile.cc | 2 +- src/cpu/o3/regfile.hh | 2 +- src/cpu/reg_class.hh | 17 +++++++++-------- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/src/arch/arm/tracers/tarmac_record.hh b/src/arch/arm/tracers/tarmac_record.hh index a1d42b2065..fb45e9edaa 100644 --- a/src/arch/arm/tracers/tarmac_record.hh +++ b/src/arch/arm/tracers/tarmac_record.hh @@ -162,7 +162,7 @@ class TarmacTracerRecord : public TarmacBaseRecord /** True if register entry is valid */ bool regValid; /** Register class */ - RegClass regClass; + RegClassType regClass; /** Register arch number */ RegIndex regRel; /** Register name to be printed */ diff --git a/src/cpu/o3/regfile.cc b/src/cpu/o3/regfile.cc index df9dd7807d..f2f0111e87 100644 --- a/src/cpu/o3/regfile.cc +++ b/src/cpu/o3/regfile.cc @@ -196,7 +196,7 @@ PhysRegFile::getRegElemIds(PhysRegIdPtr reg) } PhysRegFile::IdRange -PhysRegFile::getRegIds(RegClass cls) +PhysRegFile::getRegIds(RegClassType cls) { switch (cls) { diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index c7cf807a70..8101d532d6 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -357,7 +357,7 @@ class PhysRegFile * Auxiliary function to transition from Full vector mode to Elem mode * and to initialise the rename map. */ - IdRange getRegIds(RegClass cls); + IdRange getRegIds(RegClassType cls); /** * Get the true physical register id. diff --git a/src/cpu/reg_class.hh b/src/cpu/reg_class.hh index 0b57487aaf..f7a4d1c929 100644 --- a/src/cpu/reg_class.hh +++ b/src/cpu/reg_class.hh @@ -53,7 +53,7 @@ namespace gem5 { /** Enumerate the classes of registers. */ -enum RegClass +enum RegClassType { IntRegClass, ///< Integer register FloatRegClass, ///< Floating-point register @@ -114,7 +114,7 @@ class RegId { protected: static const char* regClassStrings[]; - RegClass regClass; + RegClassType regClass; RegIndex regIdx; ElemIndex elemIdx; static constexpr size_t Scale = TheISA::NumVecElemPerVecReg; @@ -125,10 +125,11 @@ class RegId public: RegId() : RegId(IntRegClass, 0) {} - RegId(RegClass reg_class, RegIndex reg_idx) + RegId(RegClassType reg_class, RegIndex reg_idx) : RegId(reg_class, reg_idx, IllegalElemIndex) {} - explicit RegId(RegClass reg_class, RegIndex reg_idx, ElemIndex elem_idx) + explicit RegId(RegClassType reg_class, RegIndex reg_idx, + ElemIndex elem_idx) : regClass(reg_class), regIdx(reg_idx), elemIdx(elem_idx), numPinnedWrites(0) { @@ -172,7 +173,7 @@ class RegId } /** @return true if it is of the specified class. */ - bool is(RegClass reg_class) const { return regClass == reg_class; } + bool is(RegClassType reg_class) const { return regClass == reg_class; } /** Index accessors */ /** @{ */ @@ -202,7 +203,7 @@ class RegId /** Elem accessor */ RegIndex elemIndex() const { return elemIdx; } /** Class accessor */ - RegClass classValue() const { return regClass; } + RegClassType classValue() const { return regClass; } /** Return a const char* with the register class name. */ const char* className() const { return regClassStrings[regClass]; } @@ -233,14 +234,14 @@ class PhysRegId : private RegId {} /** Scalar PhysRegId constructor. */ - explicit PhysRegId(RegClass _regClass, RegIndex _regIdx, + explicit PhysRegId(RegClassType _regClass, RegIndex _regIdx, RegIndex _flatIdx) : RegId(_regClass, _regIdx), flatIdx(_flatIdx), numPinnedWritesToComplete(0), pinned(false) {} /** Vector PhysRegId constructor (w/ elemIndex). */ - explicit PhysRegId(RegClass _regClass, RegIndex _regIdx, + explicit PhysRegId(RegClassType _regClass, RegIndex _regIdx, ElemIndex elem_idx, RegIndex flat_idx) : RegId(_regClass, _regIdx, elem_idx), flatIdx(flat_idx), numPinnedWritesToComplete(0), pinned(false)