From ba3aa067a31f4802e43b024d3c07b32b4dde8fd8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tiago=20M=C3=BCck?= Date: Tue, 13 Apr 2021 20:16:34 -0500 Subject: [PATCH] configs: CHI inc transitions_per_cycle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previous limit may unintentionally throttle performance for controllers with a large TBE table and high traffic. Change-Id: I34d6f8727519b259bb3d4a80b1fff6c59197c508 Signed-off-by: Tiago Mück Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63672 Maintainer: Bobby Bruce Reviewed-by: Jason Lowe-Power Tested-by: kokoro --- configs/ruby/CHI_config.py | 5 +++-- .../components/cachehierarchies/chi/nodes/abstract_node.py | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/ruby/CHI_config.py b/configs/ruby/CHI_config.py index 98f08c3f02..a95efec16f 100644 --- a/configs/ruby/CHI_config.py +++ b/configs/ruby/CHI_config.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021 ARM Limited +# Copyright (c) 2021,2022 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -206,7 +206,7 @@ class CHI_Cache_Controller(Cache_Controller): # triggers. To limit the controller performance, tweak other # params such as: input port buffer size, cache banks, and output # port latency - self.transitions_per_cycle = 128 + self.transitions_per_cycle = 1024 # This should be set to true in the data cache controller to enable # timeouts on unique lines when a store conditional fails self.sc_lock_enabled = False @@ -670,6 +670,7 @@ class CHI_SNF_Base(CHI_Node): responseFromMemory=MessageBuffer(), requestToMemory=MessageBuffer(ordered=True), reqRdy=TriggerMessageBuffer(), + transitions_per_cycle=1024, ) self.connectController(self._cntrl) diff --git a/src/python/gem5/components/cachehierarchies/chi/nodes/abstract_node.py b/src/python/gem5/components/cachehierarchies/chi/nodes/abstract_node.py index d2bde12884..9853174464 100644 --- a/src/python/gem5/components/cachehierarchies/chi/nodes/abstract_node.py +++ b/src/python/gem5/components/cachehierarchies/chi/nodes/abstract_node.py @@ -77,7 +77,7 @@ class AbstractNode(Cache_Controller): # triggers. To limit the controller performance, tweak other # params such as: input port buffer size, cache banks, and output # port latency - self.transitions_per_cycle = 128 + self.transitions_per_cycle = 1024 # This should be set to true in the data cache controller to enable # timeouts on unique lines when a store conditional fails self.sc_lock_enabled = False