From b9a19625cec46fc2dcabfeb362d6f3e5db859e60 Mon Sep 17 00:00:00 2001 From: Erin Le Date: Tue, 22 Oct 2024 14:49:21 -0700 Subject: [PATCH] stdlib: add SE mode to X86Board This commit adds SE mode to X86Board. X86DemoBoard was also modified, as functions that were previously needed to add SE mode to X86DemoBoard were removed. --- .../gem5/components/boards/x86_board.py | 50 +++++++++++------ .../gem5/prebuilt/demo/x86_demo_board.py | 53 +------------------ 2 files changed, 36 insertions(+), 67 deletions(-) diff --git a/src/python/gem5/components/boards/x86_board.py b/src/python/gem5/components/boards/x86_board.py index f453c49c24..eb2cbaa942 100644 --- a/src/python/gem5/components/boards/x86_board.py +++ b/src/python/gem5/components/boards/x86_board.py @@ -56,6 +56,7 @@ from m5.objects import ( ) from m5.util.convert import toMemorySize +from ...components.boards.se_binary_workload import SEBinaryWorkload from ...isas import ISA from ...resources.resource import AbstractResource from ...utils.override import overrides @@ -66,7 +67,7 @@ from .abstract_system_board import AbstractSystemBoard from .kernel_disk_workload import KernelDiskWorkload -class X86Board(AbstractSystemBoard, KernelDiskWorkload): +class X86Board(AbstractSystemBoard, KernelDiskWorkload, SEBinaryWorkload): """ A board capable of full system simulation for X86. @@ -97,17 +98,18 @@ class X86Board(AbstractSystemBoard, KernelDiskWorkload): @overrides(AbstractSystemBoard) def _setup_board(self) -> None: - self.pc = Pc() + if self.is_fullsystem(): + self.pc = Pc() - self.workload = X86FsLinux() + self.workload = X86FsLinux() - # North Bridge - self.iobus = IOXBar() + # North Bridge + self.iobus = IOXBar() - # Set up all of the I/O. - self._setup_io_devices() + # Set up all of the I/O. + self._setup_io_devices() - self.m5ops_base = 0xFFFF0000 + self.m5ops_base = 0xFFFF0000 def _setup_io_devices(self): """Sets up the x86 IO devices. @@ -291,27 +293,45 @@ class X86Board(AbstractSystemBoard, KernelDiskWorkload): @overrides(AbstractSystemBoard) def has_io_bus(self) -> bool: - return True + return self.is_fullsystem() @overrides(AbstractSystemBoard) - def get_io_bus(self) -> BaseXBar: - return self.iobus + def get_io_bus(self) -> IOXBar: + if self.has_io_bus(): + return self.iobus + else: + raise NotImplementedError( + "Board was not configured for FS mode and does not have an " + "I/O bus. Use `has_io_bus()` to check this." + ) @overrides(AbstractSystemBoard) def has_dma_ports(self) -> bool: - return True + return self.is_fullsystem() @overrides(AbstractSystemBoard) def get_dma_ports(self) -> Sequence[Port]: - return [self.pc.south_bridge.ide.dma, self.iobus.mem_side_ports] + if self.has_dma_ports(): + return [self.pc.south_bridge.ide.dma, self.iobus.mem_side_ports] + else: + raise NotImplementedError( + "Board was not configured for FS mode and does not have DMA " + "ports. Use `has_dma_ports()` to check this." + ) @overrides(AbstractSystemBoard) def has_coherent_io(self) -> bool: - return True + return self.is_fullsystem() @overrides(AbstractSystemBoard) def get_mem_side_coherent_io_port(self) -> Port: - return self.iobus.mem_side_ports + if self.has_coherent_io(): + return self.iobus.mem_side_ports + else: + raise NotImplementedError( + "Board was not configured for FS mode and does not have I/O " + "ports. Use has_coherent_io to check this." + ) @overrides(AbstractSystemBoard) def _setup_memory_ranges(self): diff --git a/src/python/gem5/prebuilt/demo/x86_demo_board.py b/src/python/gem5/prebuilt/demo/x86_demo_board.py index ac89847f2b..9bed54623e 100644 --- a/src/python/gem5/prebuilt/demo/x86_demo_board.py +++ b/src/python/gem5/prebuilt/demo/x86_demo_board.py @@ -24,15 +24,8 @@ # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -from m5.objects import ( - IOXBar, - Pc, - Port, - X86FsLinux, -) from m5.util import warn -from ...components.boards.se_binary_workload import SEBinaryWorkload from ...components.boards.x86_board import X86Board from ...components.cachehierarchies.classic.private_l1_shared_l2_cache_hierarchy import ( PrivateL1SharedL2CacheHierarchy, @@ -41,11 +34,10 @@ from ...components.memory.multi_channel import DualChannelDDR4_2400 from ...components.processors.cpu_types import CPUTypes from ...components.processors.simple_processor import SimpleProcessor from ...isas import ISA -from ...utils.override import overrides from ...utils.requires import requires -class X86DemoBoard(X86Board, SEBinaryWorkload): +class X86DemoBoard(X86Board): """ This prebuilt X86 board is used for demonstration purposes. It simulates an X86 3GHz dual-core system with a 3GiB DDR4_2400 memory system. The @@ -99,46 +91,3 @@ class X86DemoBoard(X86Board, SEBinaryWorkload): memory=memory, cache_hierarchy=cache_hierarchy, ) - - @overrides(X86Board) - def _setup_board(self) -> None: - if self._is_fs: - self.pc = Pc() - - self.workload = X86FsLinux() - - # North Bridge - self.iobus = IOXBar() - - # Set up all of the I/O. - self._setup_io_devices() - - self.m5ops_base = 0xFFFF0000 - - @overrides(X86Board) - def has_io_bus(self) -> bool: - return self.is_fullsystem() - - @overrides(X86Board) - def get_io_bus(self) -> IOXBar: - if self.has_io_bus(): - return self.iobus - else: - raise NotImplementedError( - "X86DemoBoard does not have an IO bus. " - "Use `has_io_bus()` to check this." - ) - - @overrides(X86Board) - def has_coherent_io(self) -> bool: - return self.is_fullsystem() - - @overrides(X86Board) - def get_mem_side_coherent_io_port(self) -> Port: - if self.has_coherent_io(): - return self.iobus.mem_side_ports - else: - raise NotImplementedError( - "x86DemoBoard does not have any I/O ports. Use has_coherent_io" - " to check this." - )