From 97e55fc173d6c934a640888ee220d7f75d56a23b Mon Sep 17 00:00:00 2001 From: Roger Chang Date: Wed, 9 Aug 2023 15:40:37 +0800 Subject: [PATCH 1/3] cpu: Fix segment fault when using debug flags Branch Change-Id: I36624b93f53aa101a57d51f3b917696cb2809136 --- src/cpu/pred/bpred_unit.cc | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index ec751f7dc6..1bf51afe48 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -503,10 +503,12 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, "return [sn:%llu] PC: %#x Restoring RAS\n", tid, squashed_sn, hist_it->seqNum, hist_it->pc); - DPRINTF(Branch, - "[tid:%i] [squash sn:%llu] Restoring top of RAS " - "to: %i, target: %s\n", tid, squashed_sn, - hist_it->RASIndex, *hist_it->RASTarget); + if (hist_it->RASTarget != nullptr) { + DPRINTF(Branch, + "[tid:%i] [squash sn:%llu] Restoring top of RAS " + "to: %i, target: %s\n", tid, squashed_sn, + hist_it->RASIndex, *hist_it->RASTarget.get()); + } RAS[tid].restore(hist_it->RASIndex, hist_it->RASTarget.get()); hist_it->usedRAS = false; } From 81e3bfcdc385a4cdb506bb74fc66eec9c2d1bc3e Mon Sep 17 00:00:00 2001 From: rogerchang23424 Date: Thu, 10 Aug 2023 07:21:17 +0800 Subject: [PATCH 2/3] cpu: Update src/cpu/pred/bpred_unit.cc Change-Id: I0cf177676d0f9fb9db4b127d5507ba66904739c4 Co-authored-by: Jason Lowe-Power --- src/cpu/pred/bpred_unit.cc | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index 1bf51afe48..a395e7cad7 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -503,12 +503,11 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, "return [sn:%llu] PC: %#x Restoring RAS\n", tid, squashed_sn, hist_it->seqNum, hist_it->pc); - if (hist_it->RASTarget != nullptr) { - DPRINTF(Branch, - "[tid:%i] [squash sn:%llu] Restoring top of RAS " - "to: %i, target: %s\n", tid, squashed_sn, - hist_it->RASIndex, *hist_it->RASTarget.get()); - } + DPRINTF(Branch, + "[tid:%i] [squash sn:%llu] Restoring top of RAS " + "to: %i, target: %s\n", tid, squashed_sn, + hist_it->RASIndex, + hist_it->RASIndex ? *hist_it->RASTarget.get() : "no RAS"); RAS[tid].restore(hist_it->RASIndex, hist_it->RASTarget.get()); hist_it->usedRAS = false; } From f54777419d018f27f0a9178e23ec59a7e0869219 Mon Sep 17 00:00:00 2001 From: Roger Chang Date: Thu, 10 Aug 2023 14:35:19 +0800 Subject: [PATCH 3/3] cpu: Fix ?: error due to different type Change-Id: I35c50fbba047fe05cc0cc29c631002a9b68795fd --- src/cpu/pred/bpred_unit.cc | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index a395e7cad7..ed8d6c8b08 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -498,16 +498,25 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, hist_it->pushedRAS = false; } if (hist_it->usedRAS) { + + std::string RASTarget; + DPRINTF(Branch, "[tid:%i] [squash sn:%llu] Incorrectly predicted " "return [sn:%llu] PC: %#x Restoring RAS\n", tid, squashed_sn, hist_it->seqNum, hist_it->pc); - DPRINTF(Branch, + if (hist_it->RASTarget) { + std::ostringstream os; + os << *hist_it->RASTarget.get(); + RASTarget = os.str(); + } else { + RASTarget = "no RAS"; + } + DPRINTF(Branch, "[tid:%i] [squash sn:%llu] Restoring top of RAS " "to: %i, target: %s\n", tid, squashed_sn, - hist_it->RASIndex, - hist_it->RASIndex ? *hist_it->RASTarget.get() : "no RAS"); + hist_it->RASIndex, RASTarget.c_str()); RAS[tid].restore(hist_it->RASIndex, hist_it->RASTarget.get()); hist_it->usedRAS = false; }