diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index f9f6e724c7..94acf41d29 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -194,7 +194,8 @@ let {{
         regs = (size + 3) // 4
         subst = { "size" : size, "regs" : regs }
         memDecl = '''
-        union MemUnion {
+        union MemUnion
+        {
             uint8_t bytes[%(size)d];
             Element elements[%(size)d / sizeof(Element)];
             uint32_t floatRegBits[%(regs)d];
@@ -312,7 +313,8 @@ let {{
             const unsigned regs = 2 * dRegs;
             const unsigned perDReg =
                 (2 * sizeof(uint32_t)) / sizeof(Element);
-            union convStruct {
+            union convStruct
+            {
                 uint32_t cRegs[regs];
                 Element elements[dRegs * perDReg];
             } conv1, conv2;
@@ -358,7 +360,8 @@ let {{
             const unsigned regs = 2 * dRegs;
             const unsigned perDReg =
                 (2 * sizeof(uint32_t)) / sizeof(Element);
-            union convStruct {
+            union convStruct
+            {
                 uint32_t cRegs[regs];
                 Element elements[dRegs * perDReg];
             } conv1, conv2;
@@ -431,12 +434,14 @@ let {{
             microUnpackNeonCode = '''
             const unsigned perDReg = (2 * sizeof(uint32_t)) / sizeof(Element);
 
-            union SourceRegs {
+            union SourceRegs
+            {
                 uint32_t fRegs[2 * %(sRegs)d];
                 Element elements[%(sRegs)d * perDReg];
             } sourceRegs;
 
-            union DestReg {
+            union DestReg
+            {
                 uint32_t fRegs[2];
                 Element elements[perDReg];
             } destRegs[%(dRegs)d];
@@ -479,12 +484,14 @@ let {{
             microUnpackAllNeonCode = '''
             const unsigned perDReg = (2 * sizeof(uint32_t)) / sizeof(Element);
 
-            union SourceRegs {
+            union SourceRegs
+            {
                 uint32_t fRegs[2 * %(sRegs)d];
                 Element elements[%(sRegs)d * perDReg];
             } sourceRegs;
 
-            union DestReg {
+            union DestReg
+            {
                 uint32_t fRegs[2];
                 Element elements[perDReg];
             } destRegs[%(dRegs)d];
@@ -529,12 +536,14 @@ let {{
             const unsigned perDReg =
                 (2 * sizeof(uint32_t)) / sizeof(Element);
 
-            union SourceReg {
+            union SourceReg
+            {
                 uint32_t fRegs[2];
                 Element elements[perDReg];
             } sourceRegs[%(sRegs)d];
 
-            union DestRegs {
+            union DestRegs
+            {
                 uint32_t fRegs[2 * %(dRegs)d];
                 Element elements[%(dRegs)d * perDReg];
             } destRegs;
diff --git a/src/arch/arm/isa/insts/neon64_mem.isa b/src/arch/arm/isa/insts/neon64_mem.isa
index 4977c41923..d1c21d11fc 100644
--- a/src/arch/arm/isa/insts/neon64_mem.isa
+++ b/src/arch/arm/isa/insts/neon64_mem.isa
@@ -59,7 +59,8 @@ let {{
         '''
         memDecl = '''
             const int MaxNumBytes = 16;
-            union MemUnion {
+            union MemUnion
+            {
                 uint8_t bytes[MaxNumBytes];
                 uint32_t floatRegBits[MaxNumBytes / 4];
             };
diff --git a/src/arch/arm/kvm/armv8_cpu.cc b/src/arch/arm/kvm/armv8_cpu.cc
index 54fa8b2cd6..94dd09337a 100644
--- a/src/arch/arm/kvm/armv8_cpu.cc
+++ b/src/arch/arm/kvm/armv8_cpu.cc
@@ -81,7 +81,8 @@ kvmFPReg(const int num)
         (SIMD_REG(fp_regs.vregs[1]) - SIMD_REG(fp_regs.vregs[0])) * num;
 }
 
-union KvmFPReg {
+union KvmFPReg
+{
     union {
         uint32_t i;
         float f;
diff --git a/src/arch/gcn3/gpu_decoder.hh b/src/arch/gcn3/gpu_decoder.hh
index b9ae136bfa..0cd668b3a4 100644
--- a/src/arch/gcn3/gpu_decoder.hh
+++ b/src/arch/gcn3/gpu_decoder.hh
@@ -1635,7 +1635,8 @@ namespace Gcn3ISA
         unsigned int   SRC1_ABS : 1;
     };
 
-    union InstFormat {
+    union InstFormat
+    {
         InFmt_DS            iFmt_DS;
         InFmt_DS_1          iFmt_DS_1;
         InFmt_EXP           iFmt_EXP;
diff --git a/src/cpu/inst_res.hh b/src/cpu/inst_res.hh
index 0495138b13..21ed297747 100644
--- a/src/cpu/inst_res.hh
+++ b/src/cpu/inst_res.hh
@@ -46,7 +46,8 @@
 class InstResult
 {
   public:
-    union MultiResult {
+    union MultiResult
+    {
         uint64_t integer;
         double dbl;
         TheISA::VecRegContainer vector;
diff --git a/src/dev/pci/pcireg.h b/src/dev/pci/pcireg.h
index 67d5a61e2b..8341ee4cf2 100644
--- a/src/dev/pci/pcireg.h
+++ b/src/dev/pci/pcireg.h
@@ -64,7 +64,8 @@ BitUnion16(PciCommandRegister)
     Bitfield<0> ioSpace;
 EndBitUnion(PciCommandRegister)
 
-union PCIConfig {
+union PCIConfig
+{
     uint8_t data[64];
 
     struct {
@@ -216,7 +217,8 @@ union PCIConfig {
  *  Defines the Power Management capability register and all its associated
  *  bitfields for a PCIe device.
  */
-union PMCAP {
+union PMCAP
+{
     uint8_t data[6];
     struct {
         uint16_t pid;  /* 0:7  cid
@@ -249,7 +251,8 @@ union PMCAP {
  *  can be filled in if a device model supports both, but only 1 of
  *  MSI/MSIX/INTx interrupt mode can be selected at a given time.
  */
-union MSICAP {
+union MSICAP
+{
     uint8_t data[24];
     struct {
         uint16_t mid;  /* 0:7  cid
@@ -276,7 +279,8 @@ union MSICAP {
  *  Defines the MSI-X Capability register and its associated bitfields for
  *  a PCIe device.
  */
-union MSIXCAP {
+union MSIXCAP
+{
     uint8_t data[12];
     struct {
         uint16_t mxid; /* 0:7  cid
@@ -296,7 +300,8 @@ union MSIXCAP {
     };
 };
 
-union MSIXTable {
+union MSIXTable
+{
     struct {
         uint32_t addr_lo;
         uint32_t addr_hi;
diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 57132c07e7..611c5cc847 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -1516,7 +1516,8 @@ getsockoptFunc(SyscallDesc *desc, ThreadContext *tc,
                VPtr<> lenPtr)
 {
     // union of all possible return value types from getsockopt
-    union val {
+    union val
+    {
         int i_val;
         long l_val;
         struct linger linger_val;