diff --git a/src/arch/arm/pcstate.hh b/src/arch/arm/pcstate.hh index b3d7c93957..b6f46ce404 100644 --- a/src/arch/arm/pcstate.hh +++ b/src/arch/arm/pcstate.hh @@ -41,7 +41,7 @@ #ifndef __ARCH_ARM_PCSTATE_HH__ #define __ARCH_ARM_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" #include "base/bitunion.hh" #include "base/types.hh" #include "debug/Decoder.hh" diff --git a/src/arch/generic/types.hh b/src/arch/generic/pcstate.hh similarity index 100% rename from src/arch/generic/types.hh rename to src/arch/generic/pcstate.hh diff --git a/src/arch/mips/pcstate.hh b/src/arch/mips/pcstate.hh index 2c58719028..3c33069305 100644 --- a/src/arch/mips/pcstate.hh +++ b/src/arch/mips/pcstate.hh @@ -29,7 +29,7 @@ #ifndef __ARCH_MIPS_PCSTATE_HH__ #define __ARCH_MIPS_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" namespace gem5 { diff --git a/src/arch/null/pcstate.hh b/src/arch/null/pcstate.hh index 5b790bbec5..265d15b1e1 100644 --- a/src/arch/null/pcstate.hh +++ b/src/arch/null/pcstate.hh @@ -35,10 +35,10 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __ARCH_NULL_TYPES_HH__ -#define __ARCH_NULL_TYPES_HH__ +#ifndef __ARCH_NULL_PCSTATE_HH__ +#define __ARCH_NULL_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" namespace gem5 { @@ -51,4 +51,4 @@ typedef GenericISA::UPCState<4> PCState; } // namespace NullISA } // namespace gem5 -#endif // __ARCH_NULL_TYPES_HH__ +#endif // __ARCH_NULL_PCSTATE_HH__ diff --git a/src/arch/null/vecregs.hh b/src/arch/null/vecregs.hh index dcb2091b14..81c2f0d459 100644 --- a/src/arch/null/vecregs.hh +++ b/src/arch/null/vecregs.hh @@ -40,7 +40,6 @@ #include -#include "arch/generic/types.hh" #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" diff --git a/src/arch/power/pcstate.hh b/src/arch/power/pcstate.hh index d0757839aa..393c00193f 100644 --- a/src/arch/power/pcstate.hh +++ b/src/arch/power/pcstate.hh @@ -29,7 +29,7 @@ #ifndef __ARCH_POWER_PCSTATE_HH__ #define __ARCH_POWER_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" #include "arch/power/types.hh" #include "enums/ByteOrder.hh" diff --git a/src/arch/riscv/pcstate.hh b/src/arch/riscv/pcstate.hh index bc60a0781e..06030b347f 100644 --- a/src/arch/riscv/pcstate.hh +++ b/src/arch/riscv/pcstate.hh @@ -42,7 +42,7 @@ #ifndef __ARCH_RISCV_PCSTATE_HH__ #define __ARCH_RISCV_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" namespace gem5 { diff --git a/src/arch/sparc/pcstate.hh b/src/arch/sparc/pcstate.hh index 4431b38f57..a24ae5999f 100644 --- a/src/arch/sparc/pcstate.hh +++ b/src/arch/sparc/pcstate.hh @@ -29,7 +29,7 @@ #ifndef __ARCH_SPARC_PCSTATE_HH__ #define __ARCH_SPARC_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" namespace gem5 { diff --git a/src/arch/x86/pcstate.hh b/src/arch/x86/pcstate.hh index dd2ddedf6b..d04ec2c76a 100644 --- a/src/arch/x86/pcstate.hh +++ b/src/arch/x86/pcstate.hh @@ -38,7 +38,7 @@ #ifndef __ARCH_X86_PCSTATE_HH__ #define __ARCH_X86_PCSTATE_HH__ -#include "arch/generic/types.hh" +#include "arch/generic/pcstate.hh" #include "sim/serialize.hh" namespace gem5 diff --git a/src/cpu/inst_res.hh b/src/cpu/inst_res.hh index cfdaa154c3..68e189a73d 100644 --- a/src/cpu/inst_res.hh +++ b/src/cpu/inst_res.hh @@ -40,7 +40,6 @@ #include -#include "arch/generic/types.hh" #include "arch/generic/vec_reg.hh" namespace gem5 diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 4e82df03c2..f5197b2a8e 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -49,7 +49,6 @@ #include #include -#include "arch/generic/types.hh" #include "arch/pcstate.hh" #include "base/statistics.hh" #include "config/the_isa.hh" diff --git a/src/cpu/o3/regfile.cc b/src/cpu/o3/regfile.cc index fed4125c51..df9dd7807d 100644 --- a/src/cpu/o3/regfile.cc +++ b/src/cpu/o3/regfile.cc @@ -42,7 +42,6 @@ #include "cpu/o3/regfile.hh" #include "cpu/o3/free_list.hh" -#include "arch/generic/types.hh" #include "cpu/o3/free_list.hh" namespace gem5