From ac5280fedc9ed72382534e4784377d97dfbeaaa1 Mon Sep 17 00:00:00 2001
From: Hoa Nguyen <hn@hnpl.org>
Date: Wed, 20 Sep 2023 13:49:10 -0700
Subject: [PATCH] mem,sim: Change the type of cache_line_size to Addr

Change-Id: Id39e8249fef89c0d59bb39f8104650257ff00245
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
---
 src/mem/port_proxy.cc | 4 ++--
 src/mem/port_proxy.hh | 8 ++++----
 src/sim/system.hh     | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/mem/port_proxy.cc b/src/mem/port_proxy.cc
index 44e8fbbc90..a3c82452e2 100644
--- a/src/mem/port_proxy.cc
+++ b/src/mem/port_proxy.cc
@@ -44,12 +44,12 @@
 namespace gem5
 {
 
-PortProxy::PortProxy(ThreadContext *tc, unsigned int cache_line_size) :
+PortProxy::PortProxy(ThreadContext *tc, Addr cache_line_size) :
     PortProxy([tc](PacketPtr pkt)->void { tc->sendFunctional(pkt); },
         cache_line_size)
 {}
 
-PortProxy::PortProxy(const RequestPort &port, unsigned int cache_line_size) :
+PortProxy::PortProxy(const RequestPort &port, Addr cache_line_size) :
     PortProxy([&port](PacketPtr pkt)->void { port.sendFunctional(pkt); },
         cache_line_size)
 {}
diff --git a/src/mem/port_proxy.hh b/src/mem/port_proxy.hh
index 2e60a527cd..49c6d6f811 100644
--- a/src/mem/port_proxy.hh
+++ b/src/mem/port_proxy.hh
@@ -92,7 +92,7 @@ class PortProxy : FunctionalRequestProtocol
     SendFunctionalFunc sendFunctional;
 
     /** Granularity of any transactions issued through this proxy. */
-    const unsigned int _cacheLineSize;
+    const Addr _cacheLineSize;
 
     void
     recvFunctionalSnoop(PacketPtr pkt) override
@@ -103,13 +103,13 @@ class PortProxy : FunctionalRequestProtocol
     }
 
   public:
-    PortProxy(SendFunctionalFunc func, unsigned int cache_line_size) :
+    PortProxy(SendFunctionalFunc func, Addr cache_line_size) :
         sendFunctional(func), _cacheLineSize(cache_line_size)
     {}
 
     // Helpers which create typical SendFunctionalFunc-s from other objects.
-    PortProxy(ThreadContext *tc, unsigned int cache_line_size);
-    PortProxy(const RequestPort &port, unsigned int cache_line_size);
+    PortProxy(ThreadContext *tc, Addr cache_line_size);
+    PortProxy(const RequestPort &port, Addr cache_line_size);
 
     virtual ~PortProxy() {}
 
diff --git a/src/sim/system.hh b/src/sim/system.hh
index d2725c32a9..bb64f639b5 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -305,7 +305,7 @@ class System : public SimObject, public PCEventScope
     /**
      * Get the cache line size of the system.
      */
-    unsigned int cacheLineSize() const { return _cacheLineSize; }
+    Addr cacheLineSize() const { return _cacheLineSize; }
 
     Threads threads;
 
@@ -405,7 +405,7 @@ class System : public SimObject, public PCEventScope
 
     enums::MemoryMode memoryMode;
 
-    const unsigned int _cacheLineSize;
+    const Addr _cacheLineSize;
 
     uint64_t workItemsBegin = 0;
     uint64_t workItemsEnd = 0;