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mem-ruby: Sequencer can be used without cache

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Moved the dcache check to the LLSC functions that use it.
This allows a Sequencer to be coupled with a gem5 object
that does not need a cache (as long as it doesn't issue
LLSC instructions).

Also, icache was not used at all so it was removed.

Change-Id: I04bd2711f8d0a7dfc952cff8e0020d2d1881cae1
Signed-off-by: Tiago Mück <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31267
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bradford Beckmann <bradford.beckmann@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Tiago Mück
2020-05-28 16:16:20 -05:00
parent aa8bca47f4
commit ab309b9e4e
19 changed files with 26 additions and 39 deletions
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2
configs/ruby/MI_example.py
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@@ -92,7 +92,7 @@ def create_system(options, full_system, system, dma_ports, bootmem,
clk_domain=clk_domain,
ruby_system=ruby_system)
cpu_seq = RubySequencer(version=i, icache=cache, dcache=cache,
cpu_seq = RubySequencer(version=i, dcache=cache,
clk_domain=clk_domain, ruby_system=ruby_system)
l1_cntrl.sequencer = cpu_seq