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revert 5af8f40d8f2c

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This commit is contained in:
Nilay Vaish
2015-07-28 01:58:04 -05:00
parent 608641e23c
commit aafa5c3f86
55 changed files with 78 additions and 876 deletions
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6
src/cpu/reg_class.hh
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@@ -42,7 +42,6 @@ enum RegClass {
IntRegClass, ///< Integer register
FloatRegClass, ///< Floating-point register
CCRegClass, ///< Condition-code register
VectorRegClass, ///< Vector register
MiscRegClass ///< Control (misc) register
};
@@ -77,15 +76,12 @@ RegClass regIdxToClass(TheISA::RegIndex reg_idx,
} else if (reg_idx < TheISA::CC_Reg_Base) {
cl = FloatRegClass;
offset = TheISA::FP_Reg_Base;
} else if (reg_idx < TheISA::Vector_Reg_Base) {
} else if (reg_idx < TheISA::Misc_Reg_Base) {
// if there are no CC regs, the ISA should set
// CC_Reg_Base == Misc_Reg_Base so the if above
// never succeeds
cl = CCRegClass;
offset = TheISA::CC_Reg_Base;
} else if (reg_idx < TheISA::Misc_Reg_Base) {
cl = VectorRegClass;
offset = TheISA::Vector_Reg_Base;
} else {
cl = MiscRegClass;
offset = TheISA::Misc_Reg_Base;