diff --git a/src/arch/riscv/isa.hh b/src/arch/riscv/isa.hh
index 04bbcfbe9e..a27982bc7d 100644
--- a/src/arch/riscv/isa.hh
+++ b/src/arch/riscv/isa.hh
@@ -117,6 +117,9 @@ class ISA : public BaseISA
     newPCState(Addr new_inst_addr=0) const override
     {
         unsigned vlenb = vlen >> 3;
+        if (_rvType == RV32) {
+            new_inst_addr = sext<32>(new_inst_addr);
+        }
         return new PCState(new_inst_addr, _rvType, vlenb);
     }