system-arm: Remove armv7 DTS from gem5
With this patch we are dropping support for armv7-based DTBs Change-Id: Ic83b5ee790eda53a2341d8335cb01b86e4f62b0b Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48983 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
@@ -34,10 +34,8 @@ NUM_CPUS := 1 2 4 8 16
|
|||||||
CREATE_TARGET=$(foreach n, $(NUM_CPUS), $(1)_$(n)cpu.dtb)
|
CREATE_TARGET=$(foreach n, $(NUM_CPUS), $(1)_$(n)cpu.dtb)
|
||||||
|
|
||||||
TARGET_PREFIX=\
|
TARGET_PREFIX=\
|
||||||
armv7_gem5_v1 \
|
|
||||||
armv8_gem5_v1 \
|
armv8_gem5_v1 \
|
||||||
armv8_gem5_v2 \
|
armv8_gem5_v2 \
|
||||||
armv7_gem5_v1_hdlcd \
|
|
||||||
armv8_gem5_v1_hdlcd \
|
armv8_gem5_v1_hdlcd \
|
||||||
armv8_gem5_v2_hdlcd
|
armv8_gem5_v2_hdlcd
|
||||||
|
|
||||||
@@ -75,14 +73,6 @@ GEN_DTS=mkdir -p .gen; \
|
|||||||
|
|
||||||
all: $(TARGETS)
|
all: $(TARGETS)
|
||||||
|
|
||||||
.gen/armv7_gem5_v1_%cpu.dts: armv7.dts \
|
|
||||||
$(VEXPRESS_GEM5_V1_DTSIS)
|
|
||||||
$(call GEN_DTS,vexpress_gem5_v1_base.dtsi,$*)
|
|
||||||
|
|
||||||
.gen/armv7_gem5_v1_hdlcd_%cpu.dts: armv7.dts \
|
|
||||||
$(VEXPRESS_GEM5_V1_HDLCD_DTSIS)
|
|
||||||
$(call GEN_DTS,vexpress_gem5_v1_hdlcd.dtsi,$*)
|
|
||||||
|
|
||||||
.gen/armv8_gem5_v1_%cpu.dts: armv8.dts \
|
.gen/armv8_gem5_v1_%cpu.dts: armv8.dts \
|
||||||
$(VEXPRESS_GEM5_V1_DTSIS)
|
$(VEXPRESS_GEM5_V1_DTSIS)
|
||||||
$(call GEN_DTS,vexpress_gem5_v1_base.dtsi,$*)
|
$(call GEN_DTS,vexpress_gem5_v1_base.dtsi,$*)
|
||||||
|
|||||||
@@ -1,105 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright (c) 2015-2016, 2019 ARM Limited
|
|
||||||
* All rights reserved
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are
|
|
||||||
* met: redistributions of source code must retain the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer;
|
|
||||||
* redistributions in binary form must reproduce the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
|
||||||
* documentation and/or other materials provided with the distribution;
|
|
||||||
* neither the name of the copyright holders nor the names of its
|
|
||||||
* contributors may be used to endorse or promote products derived from
|
|
||||||
* this software without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/dts-v1/;
|
|
||||||
|
|
||||||
/include/ CONF_PLATFORM
|
|
||||||
|
|
||||||
#define CPU(n) \
|
|
||||||
cpu@ ## n { \
|
|
||||||
device_type = "cpu"; \
|
|
||||||
compatible = "gem5,arm", "arm,cortex-a15"; \
|
|
||||||
reg = < n >; \
|
|
||||||
};
|
|
||||||
|
|
||||||
/ {
|
|
||||||
model = "V2P-CA15";
|
|
||||||
compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
|
|
||||||
|
|
||||||
memory@80000000 {
|
|
||||||
device_type = "memory";
|
|
||||||
reg = <0 0x80000000 0x4 0x00000000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
cpus {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
#if CONF_CPUS > 0
|
|
||||||
CPU(0)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 1
|
|
||||||
CPU(1)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 2
|
|
||||||
CPU(2)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 3
|
|
||||||
CPU(3)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 4
|
|
||||||
CPU(4)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 5
|
|
||||||
CPU(5)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 6
|
|
||||||
CPU(6)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 7
|
|
||||||
CPU(7)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 8
|
|
||||||
CPU(8)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 9
|
|
||||||
CPU(9)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 10
|
|
||||||
CPU(10)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 11
|
|
||||||
CPU(11)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 12
|
|
||||||
CPU(12)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 13
|
|
||||||
CPU(13)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 14
|
|
||||||
CPU(14)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 15
|
|
||||||
CPU(15)
|
|
||||||
#endif
|
|
||||||
#if CONF_CPUS > 16
|
|
||||||
#error Unsupported number of CPUs
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
};
|
|
||||||
Reference in New Issue
Block a user