fix endian issues with condition codes

use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
This commit is contained in:
Ali Saidi
2006-11-10 20:17:42 -05:00
parent 6d54a77518
commit aa19b2e7bc
12 changed files with 116 additions and 48 deletions

View File

@@ -38,6 +38,7 @@
#include "arch/regfile.hh"
#include "arch/utility.hh"
#include "arch/tlb.hh"
#include "base/loader/symtab.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
@@ -232,17 +233,22 @@ Trace::InstRecord::dump(ostream &outs)
bool diffPC = false;
bool diffInst = false;
bool diffRegs = false;
Addr m5Pc, lgnPc;
if(!staticInst->isMicroOp() || staticInst->isLastMicroOp()) {
while (!compared) {
m5Pc = PC & TheISA::PAddrImplMask;
lgnPc = shared_data->pc & TheISA::PAddrImplMask;
if (shared_data->flags == OWN_M5) {
if (shared_data->pc != PC)
if (lgnPc != m5Pc)
diffPC = true;
if (shared_data->instruction != staticInst->machInst)
diffInst = true;
for (int i = 0; i < TheISA::NumIntRegs; i++) {
if (thread->readIntReg(i) != shared_data->intregs[i])
for (int i = 0; i < TheISA::NumRegularIntRegs; i++) {
if (thread->readIntReg(i) != shared_data->intregs[i]) {
diffRegs = true;
}
}
if (diffPC || diffInst || diffRegs ) {
@@ -253,19 +259,19 @@ Trace::InstRecord::dump(ostream &outs)
outs << " [Instruction]";
if (diffRegs)
outs << " [IntRegs]";
outs << endl << endl;;
outs << endl << endl;
outs << setfill(' ') << setw(15)
outs << right << setfill(' ') << setw(15)
<< "M5 PC: " << "0x"<< setw(16) << setfill('0')
<< hex << PC << endl;
<< hex << m5Pc << endl;
outs << setfill(' ') << setw(15)
<< "Legion PC: " << "0x"<< setw(16) << setfill('0') << hex
<< shared_data->pc << endl << endl;
<< lgnPc << endl << endl;
outs << setfill(' ') << setw(15)
<< "M5 Inst: " << "0x"<< setw(8)
<< setfill('0') << hex << staticInst->machInst
<< staticInst->disassemble(PC, debugSymbolTable)
<< staticInst->disassemble(m5Pc, debugSymbolTable)
<< endl;
StaticInstPtr legionInst = StaticInst::decode(makeExtMI(shared_data->instruction, thread));
@@ -273,7 +279,7 @@ Trace::InstRecord::dump(ostream &outs)
<< " Legion Inst: "
<< "0x" << setw(8) << setfill('0') << hex
<< shared_data->instruction
<< legionInst->disassemble(shared_data->pc, debugSymbolTable)
<< legionInst->disassemble(lgnPc, debugSymbolTable)
<< endl;
outs << endl;
@@ -386,7 +392,7 @@ Trace::InstRecord::setParams()
// If were going to be in lockstep with Legion
// Setup shared memory, and get otherwise ready
if (flags[LEGION_LOCKSTEP]) {
int shmfd = shmget(getuid(), sizeof(SharedData), 0777);
int shmfd = shmget('M' << 24 | getuid(), sizeof(SharedData), 0777);
if (shmfd < 0)
fatal("Couldn't get shared memory fd. Is Legion running?");
@@ -401,6 +407,8 @@ Trace::InstRecord::setParams()
fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION,
shared_data->version);
// step legion forward one cycle so we can get register values
shared_data->flags = OWN_LEGION;
}
}

View File

@@ -30,7 +30,7 @@
#include <unistd.h>
#define VERSION 0xA1000002
#define VERSION 0xA1000005
#define OWN_M5 0x000000AA
#define OWN_LEGION 0x00000055
@@ -41,9 +41,35 @@ typedef struct {
uint32_t version;
uint64_t pc;
uint64_t new_pc;
uint32_t instruction;
uint32_t new_instruction;
uint64_t intregs[32];
uint64_t tpc[8];
uint64_t tnpc[8];
uint64_t tstate[8];
uint16_t tt[8];
uint64_t tba;
uint64_t hpstate;
uint64_t htstate[8];
uint64_t htba;
uint16_t pstate;
uint64_t y;
uint8_t ccr;
uint8_t tl;
uint8_t gl;
uint8_t asi;
uint8_t pil;
uint8_t cwp;
uint8_t cansave;
uint8_t canrestore;
uint8_t otherwin;
uint8_t cleanwin;
} SharedData;
/** !!! ^^^ Increment VERSION on change ^^^ !!! **/