style: [patch 3/22] reduce include dependencies in some headers

Used cppclean to help identify useless includes and removed them. This
involved erroneously included headers, but also cases where forward
declarations could have been used rather than a full include.

src/mem/cache/prefetch/stride.cc

@@ -49,6 +49,7 @@
 #include "mem/cache/prefetch/stride.hh"
 
 #include "base/random.hh"
+#include "base/trace.hh"
 #include "debug/HWPrefetch.hh"
 
 StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p)

src/mem/external_master.cc

@@ -43,6 +43,7 @@
 #include <cctype>
 #include <iomanip>
 
+#include "base/trace.hh"
 #include "debug/ExternalPort.hh"
 
 std::map<std::string, ExternalMaster::Handler *>

src/mem/external_slave.cc

@@ -42,6 +42,7 @@
 #include <cctype>
 #include <iomanip>
 
+#include "base/trace.hh"
 #include "debug/ExternalPort.hh"
 
 /** Implement a `stub' port which just responds to requests by printing

src/mem/mem_checker.hh

@@ -48,6 +48,7 @@
 #include <vector>
 
 #include "base/misc.hh"
+#include "base/trace.hh"
 #include "base/types.hh"
 #include "debug/MemChecker.hh"
 #include "params/MemChecker.hh"

src/mem/multi_level_page_table.hh

@@ -38,13 +38,12 @@
 
 #include <string>
 
-#include "arch/isa_traits.hh"
 #include "arch/tlb.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
 #include "mem/page_table.hh"
-#include "sim/serialize.hh"
-#include "sim/system.hh"
+
+class System;
 
 /**
  * This class implements an in-memory multi-level page table that can be

src/mem/multi_level_page_table_impl.hh

@@ -32,18 +32,15 @@
  * @file
  * Definitions of page table
  */
-#include <fstream>
-#include <map>
 #include <string>
 
-#include "base/bitfield.hh"
-#include "base/intmath.hh"
+#include "arch/isa_traits.hh"
+#include "arch/tlb.hh"
 #include "base/trace.hh"
 #include "config/the_isa.hh"
 #include "debug/MMU.hh"
 #include "mem/multi_level_page_table.hh"
-#include "sim/faults.hh"
-#include "sim/sim_object.hh"
+#include "mem/page_table.hh"
 
 using namespace std;
 using namespace TheISA;

src/mem/page_table.cc

@@ -37,18 +37,13 @@
  */
 #include "mem/page_table.hh"
 
-#include <fstream>
-#include <map>
-#include <memory>
 #include <string>
 
-#include "base/bitfield.hh"
-#include "base/intmath.hh"
 #include "base/trace.hh"
 #include "config/the_isa.hh"
 #include "debug/MMU.hh"
 #include "sim/faults.hh"
-#include "sim/sim_object.hh"
+#include "sim/serialize.hh"
 
 using namespace std;
 using namespace TheISA;

src/mem/page_table.hh

@@ -42,13 +42,14 @@
 
 #include "arch/isa_traits.hh"
 #include "arch/tlb.hh"
+#include "base/intmath.hh"
 #include "base/types.hh"
 #include "config/the_isa.hh"
 #include "mem/request.hh"
 #include "sim/serialize.hh"
-#include "sim/system.hh"
 
 class ThreadContext;
+class System;
 
 /**
  * Declaration of base class for page table

src/mem/ruby/network/MessageBuffer.hh

@@ -41,6 +41,7 @@
 #include <string>
 #include <vector>
 
+#include "base/trace.hh"
 #include "debug/RubyQueue.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/common/Consumer.hh"

src/mem/ruby/structures/AbstractReplacementPolicy.cc

@@ -30,6 +30,8 @@
 
 #include "mem/ruby/structures/AbstractReplacementPolicy.hh"
 
+#include "base/misc.hh"
+
 AbstractReplacementPolicy::AbstractReplacementPolicy(const Params * p)
   : SimObject(p)
 {

src/mem/se_translating_port_proxy.hh

@@ -45,9 +45,9 @@
 #ifndef __MEM_SE_TRANSLATING_PORT_PROXY_HH__
 #define __MEM_SE_TRANSLATING_PORT_PROXY_HH__
 
-#include "mem/page_table.hh"
 #include "mem/port_proxy.hh"
 
+class PageTableBase;
 class Process;
 
 /**

src/mem/simple_mem.cc

@@ -45,6 +45,7 @@
 #include "mem/simple_mem.hh"
 
 #include "base/random.hh"
+#include "base/trace.hh"
 #include "debug/Drain.hh"
 
 using namespace std;